| Message ID | 1604571846-14037-4-git-send-email-spujar@nvidia.com |
|---|---|
| State | Accepted |
| Commit | d806cdaea133c0c4d66359e4398651be4715f51f |
| Headers | show |
| Series | Convert few Tegra docs to json-schema | expand |
On Thu, 05 Nov 2020 15:54:05 +0530, Sameer Pujar wrote: > Update Tegra compatibles to support newer Tegra chips and required > combinations. > > Signed-off-by: Sameer Pujar <spujar@nvidia.com> > --- > .../devicetree/bindings/interrupt-controller/arm,gic.yaml | 9 ++++++++- > 1 file changed, 8 insertions(+), 1 deletion(-) > My bot found errors running 'make dt_binding_check' on your patch: yamllint warnings/errors: ./Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml:56:9: [warning] wrong indentation: expected 10 but found 8 (indentation) ./Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml:58:11: [warning] wrong indentation: expected 12 but found 10 (indentation) ./Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml:59:13: [warning] wrong indentation: expected 14 but found 12 (indentation) dtschema/dtc warnings/errors: See https://patchwork.ozlabs.org/patch/1394860 The base for the patch is generally the last rc1. Any dependencies should be noted. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit.
On Thu, 05 Nov 2020 15:54:05 +0530, Sameer Pujar wrote: > Update Tegra compatibles to support newer Tegra chips and required > combinations. > > Signed-off-by: Sameer Pujar <spujar@nvidia.com> > --- > .../devicetree/bindings/interrupt-controller/arm,gic.yaml | 9 ++++++++- > 1 file changed, 8 insertions(+), 1 deletion(-) > With the indentation fixed: Reviewed-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml b/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml index 0688996..614018f 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml @@ -35,7 +35,6 @@ properties: - arm,gic-400 - arm,pl390 - arm,tc11mp-gic - - nvidia,tegra210-agic - qcom,msm-8660-qgic - qcom,msm-qgic2 @@ -53,6 +52,14 @@ properties: - const: brcm,brahma-b15-gic - const: arm,cortex-a15-gic + - oneOf: + - const: nvidia,tegra210-agic + - items: + - enum: + - nvidia,tegra186-agic + - nvidia,tegra194-agic + - const: nvidia,tegra210-agic + interrupt-controller: true "#address-cells":
Update Tegra compatibles to support newer Tegra chips and required combinations. Signed-off-by: Sameer Pujar <spujar@nvidia.com> --- .../devicetree/bindings/interrupt-controller/arm,gic.yaml | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-)