| Message ID | 20201019094715.15343-7-m.szyprowski@samsung.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Add DW PCIe support for Exynos5433 SoCs | expand |
On Mon, Oct 19, 2020 at 11:47:15AM +0200, Marek Szyprowski wrote: > From: Jaehoon Chung <jh80.chung@samsung.com> > > Add the nodes relevant to PCIe PHY and PCIe support. PCIe is used for the > WiFi interface (Broadcom Limited BCM4358 802.11ac Wireless LAN SoC). > > Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> > [mszyprow: rewrote commit message, reworked board/generic dts/dtsi split] > Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> > --- > .../boot/dts/exynos/exynos5433-pinctrl.dtsi | 2 +- > .../dts/exynos/exynos5433-tm2-common.dtsi | 24 ++++++++++++- > arch/arm64/boot/dts/exynos/exynos5433.dtsi | 36 +++++++++++++++++++ > 3 files changed, 60 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi > index 9df7c65593a1..32a6518517e5 100644 > --- a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi > +++ b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi > @@ -329,7 +329,7 @@ > }; > > pcie_bus: pcie_bus { > - samsung,pins = "gpr3-4", "gpr3-5", "gpr3-6", "gpr3-7"; > + samsung,pins = "gpr3-4", "gpr3-5", "gpr3-6"; > samsung,pin-function = <EXYNOS_PIN_FUNC_3>; > samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > }; > diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi > index 829fea23d4ab..ef45ef86c48d 100644 > --- a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi > +++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi > @@ -969,6 +969,25 @@ > bus-width = <4>; > }; > > +&pcie { > + status = "okay"; > + pinctrl-names = "default"; > + pinctrl-0 = <&pcie_bus &pcie_wlanen>; > + vdd10-supply = <&ldo6_reg>; > + vdd18-supply = <&ldo7_reg>; > + assigned-clocks = <&cmu_fsys CLK_MOUT_SCLK_PCIE_100_USER>, > + <&cmu_top CLK_MOUT_SCLK_PCIE_100>; > + assigned-clock-parents = <&cmu_top CLK_SCLK_PCIE_100_FSYS>, > + <&cmu_top CLK_MOUT_BUS_PLL_USER>; > + assigned-clock-rates = <0>, <100000000>; > + interrupt-map-mask = <0 0 0 0>; > + interrupt-map = <0 0 0 0 &gic GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>; > +}; > + > +&pcie_phy { > + status = "okay"; > +}; > + > &ppmu_d0_general { > status = "okay"; > events { > @@ -1085,8 +1104,11 @@ > pinctrl-names = "default"; > pinctrl-0 = <&initial_ese>; > > + pcie_wlanen: pcie-wlanen { > + PIN(INPUT, gpj2-0, UP, FAST_SR4); > + }; > + > initial_ese: initial-state { > - PIN(INPUT, gpj2-0, DOWN, FAST_SR1); > PIN(INPUT, gpj2-1, DOWN, FAST_SR1); > PIN(INPUT, gpj2-2, DOWN, FAST_SR1); > }; > diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi > index 8eb4576da8f3..be2d1753d1d1 100644 > --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi > +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi > @@ -1029,6 +1029,11 @@ > reg = <0x145f0000 0x1038>; > }; > > + syscon_fsys: syscon@156f0000 { > + compatible = "syscon"; > + reg = <0x156f0000 0x1044>; > + }; > + > gsc_0: video-scaler@13c00000 { > compatible = "samsung,exynos5433-gsc"; > reg = <0x13c00000 0x1000>; > @@ -1830,6 +1835,37 @@ > status = "disabled"; > }; > }; > + > + pcie_phy: pcie-phy@15680000 { > + compatible = "samsung,exynos5433-pcie-phy"; > + reg = <0x15680000 0x1000>; > + samsung,pmu-syscon = <&pmu_system_controller>; > + samsung,fsys-sysreg = <&syscon_fsys>; > + #phy-cells = <0>; > + status = "disabled"; > + }; > + > + pcie: pcie@15700000 { > + compatible = "samsung,exynos5433-pcie"; > + reg = <0x156b0000 0x1000>, <0x15700000 0x1000>, > + <0x0c000000 0x1000>; dtc should complain here: arch/arm64/boot/dts/exynos/exynos5433.dtsi:1848.23-1868.5: Warning (simple_bus_reg): /soc@0/pcie@15700000: simple-bus unit address format error, expected "156b0000" > + reg-names = "elbi", "dbi", "config"; This does not match your own bindings: pcie@15700000: reg-names:1: 'bdi' was expected pcie@15700000: 'interrupt-names' is a required property Best regards, Krzysztof
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi index 9df7c65593a1..32a6518517e5 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi @@ -329,7 +329,7 @@ }; pcie_bus: pcie_bus { - samsung,pins = "gpr3-4", "gpr3-5", "gpr3-6", "gpr3-7"; + samsung,pins = "gpr3-4", "gpr3-5", "gpr3-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; }; diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi index 829fea23d4ab..ef45ef86c48d 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi @@ -969,6 +969,25 @@ bus-width = <4>; }; +&pcie { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pcie_bus &pcie_wlanen>; + vdd10-supply = <&ldo6_reg>; + vdd18-supply = <&ldo7_reg>; + assigned-clocks = <&cmu_fsys CLK_MOUT_SCLK_PCIE_100_USER>, + <&cmu_top CLK_MOUT_SCLK_PCIE_100>; + assigned-clock-parents = <&cmu_top CLK_SCLK_PCIE_100_FSYS>, + <&cmu_top CLK_MOUT_BUS_PLL_USER>; + assigned-clock-rates = <0>, <100000000>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &gic GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>; +}; + +&pcie_phy { + status = "okay"; +}; + &ppmu_d0_general { status = "okay"; events { @@ -1085,8 +1104,11 @@ pinctrl-names = "default"; pinctrl-0 = <&initial_ese>; + pcie_wlanen: pcie-wlanen { + PIN(INPUT, gpj2-0, UP, FAST_SR4); + }; + initial_ese: initial-state { - PIN(INPUT, gpj2-0, DOWN, FAST_SR1); PIN(INPUT, gpj2-1, DOWN, FAST_SR1); PIN(INPUT, gpj2-2, DOWN, FAST_SR1); }; diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi index 8eb4576da8f3..be2d1753d1d1 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi @@ -1029,6 +1029,11 @@ reg = <0x145f0000 0x1038>; }; + syscon_fsys: syscon@156f0000 { + compatible = "syscon"; + reg = <0x156f0000 0x1044>; + }; + gsc_0: video-scaler@13c00000 { compatible = "samsung,exynos5433-gsc"; reg = <0x13c00000 0x1000>; @@ -1830,6 +1835,37 @@ status = "disabled"; }; }; + + pcie_phy: pcie-phy@15680000 { + compatible = "samsung,exynos5433-pcie-phy"; + reg = <0x15680000 0x1000>; + samsung,pmu-syscon = <&pmu_system_controller>; + samsung,fsys-sysreg = <&syscon_fsys>; + #phy-cells = <0>; + status = "disabled"; + }; + + pcie: pcie@15700000 { + compatible = "samsung,exynos5433-pcie"; + reg = <0x156b0000 0x1000>, <0x15700000 0x1000>, + <0x0c000000 0x1000>; + reg-names = "elbi", "dbi", "config"; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + device_type = "pci"; + interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cmu_fsys CLK_PCIE>, + <&cmu_fsys CLK_PCLK_PCIE_PHY>; + clock-names = "pcie", "pcie_bus"; + num-lanes = <1>; + bus-range = <0x00 0xff>; + phys = <&pcie_phy>; + phy-names = "pcie-phy"; + ranges = <0x81000000 0 0 0x0c001000 0 0x00010000>, + <0x82000000 0 0x0c011000 0x0c011000 0 0x03feefff>; + status = "disabled"; + }; }; timer: timer {