Message ID | 1604402306-5348-4-git-send-email-abel.vesa@nxp.com |
---|---|
State | New |
Headers | show |
Series | Add BLK_CTL support for i.MX8MP | expand |
Quoting Abel Vesa (2020-11-03 03:18:15) > All these IDs are for one single HW gate (CCGR101) that is shared > between these root clocks. > > Signed-off-by: Abel Vesa <abel.vesa@nxp.com> > Acked-by: Rob Herring <robh@kernel.org> > Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> > --- Acked-by: Stephen Boyd <sboyd@kernel.org>
diff --git a/include/dt-bindings/clock/imx8mp-clock.h b/include/dt-bindings/clock/imx8mp-clock.h index 89c67b7..5fc2c40 100644 --- a/include/dt-bindings/clock/imx8mp-clock.h +++ b/include/dt-bindings/clock/imx8mp-clock.h @@ -322,7 +322,17 @@ #define IMX8MP_CLK_HSIO_AXI 311 #define IMX8MP_CLK_MEDIA_ISP 312 -#define IMX8MP_CLK_END 313 +#define IMX8MP_CLK_AUDIO_AHB_ROOT 313 +#define IMX8MP_CLK_AUDIO_AXI_ROOT 314 +#define IMX8MP_CLK_SAI1_ROOT 315 +#define IMX8MP_CLK_SAI2_ROOT 316 +#define IMX8MP_CLK_SAI3_ROOT 317 +#define IMX8MP_CLK_SAI5_ROOT 318 +#define IMX8MP_CLK_SAI6_ROOT 319 +#define IMX8MP_CLK_SAI7_ROOT 320 +#define IMX8MP_CLK_PDM_ROOT 321 + +#define IMX8MP_CLK_END 322 #define IMX8MP_CLK_AUDIO_BLK_CTL_SAI1_IPG 0 #define IMX8MP_CLK_AUDIO_BLK_CTL_SAI1_MCLK1 1