diff mbox series

[v2,1/5] clk: imx: gate2: Remove the IMX_CLK_GATE2_SINGLE_BIT special case

Message ID 1603889942-27026-2-git-send-email-abel.vesa@nxp.com
State Accepted
Commit 12309428c27737c21735fb28540c6c6f69f632f6
Headers show
Series Fix the gate2 and make it more flexible | expand

Commit Message

Abel Vesa Oct. 28, 2020, 12:58 p.m. UTC 
This was a hack which would allow multiple HW gates to be controlled
by a single bit. The only user of this is the imx_dev_clk_hw_gate_shared
which is not used anywhere as of now. Basically, complicates the logic
of the driver for no reason.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
 drivers/clk/imx/clk-gate2.c | 28 +++++++---------------------
 drivers/clk/imx/clk.h       |  5 +----
 2 files changed, 8 insertions(+), 25 deletions(-)
diff mbox series

Patch

diff --git a/drivers/clk/imx/clk-gate2.c b/drivers/clk/imx/clk-gate2.c
index 7eed708..49952ee 100644
--- a/drivers/clk/imx/clk-gate2.c
+++ b/drivers/clk/imx/clk-gate2.c
@@ -49,14 +49,10 @@  static int clk_gate2_enable(struct clk_hw *hw)
 	if (gate->share_count && (*gate->share_count)++ > 0)
 		goto out;
 
-	if (gate->flags & IMX_CLK_GATE2_SINGLE_BIT) {
-		ret = clk_gate_ops.enable(hw);
-	} else {
-		reg = readl(gate->reg);
-		reg &= ~(3 << gate->bit_idx);
-		reg |= gate->cgr_val << gate->bit_idx;
-		writel(reg, gate->reg);
-	}
+	reg = readl(gate->reg);
+	reg &= ~(3 << gate->bit_idx);
+	reg |= gate->cgr_val << gate->bit_idx;
+	writel(reg, gate->reg);
 
 out:
 	spin_unlock_irqrestore(gate->lock, flags);
@@ -79,13 +75,9 @@  static void clk_gate2_disable(struct clk_hw *hw)
 			goto out;
 	}
 
-	if (gate->flags & IMX_CLK_GATE2_SINGLE_BIT) {
-		clk_gate_ops.disable(hw);
-	} else {
-		reg = readl(gate->reg);
-		reg &= ~(3 << gate->bit_idx);
-		writel(reg, gate->reg);
-	}
+	reg = readl(gate->reg);
+	reg &= ~(3 << gate->bit_idx);
+	writel(reg, gate->reg);
 
 out:
 	spin_unlock_irqrestore(gate->lock, flags);
@@ -105,9 +97,6 @@  static int clk_gate2_is_enabled(struct clk_hw *hw)
 {
 	struct clk_gate2 *gate = to_clk_gate2(hw);
 
-	if (gate->flags & IMX_CLK_GATE2_SINGLE_BIT)
-		return clk_gate_ops.is_enabled(hw);
-
 	return clk_gate2_reg_is_enabled(gate->reg, gate->bit_idx);
 }
 
@@ -117,9 +106,6 @@  static void clk_gate2_disable_unused(struct clk_hw *hw)
 	unsigned long flags;
 	u32 reg;
 
-	if (gate->flags & IMX_CLK_GATE2_SINGLE_BIT)
-		return;
-
 	spin_lock_irqsave(gate->lock, flags);
 
 	if (!gate->share_count || *gate->share_count == 0) {
diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h
index 3b796b3..87b2744f 100644
--- a/drivers/clk/imx/clk.h
+++ b/drivers/clk/imx/clk.h
@@ -6,8 +6,6 @@ 
 #include <linux/spinlock.h>
 #include <linux/clk-provider.h>
 
-#define IMX_CLK_GATE2_SINGLE_BIT	1
-
 extern spinlock_t imx_ccm_lock;
 
 void imx_check_clocks(struct clk *clks[], unsigned int count);
@@ -384,8 +382,7 @@  static inline struct clk_hw *imx_dev_clk_hw_gate_shared(struct device *dev,
 				unsigned int *share_count)
 {
 	return clk_hw_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT |
-					CLK_OPS_PARENT_ENABLE, reg, shift, 0x3,
-					IMX_CLK_GATE2_SINGLE_BIT,
+					CLK_OPS_PARENT_ENABLE, reg, shift, 0x1, 0,
 					&imx_ccm_lock, share_count);
 }