Message ID | 1401284786-16604-1-git-send-email-srinivas.kandagatla@linaro.org |
---|---|
State | New |
Headers | show
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[209.132.180.67]) by mx.google.com with ESMTP id th10si23912978pab.18.2014.05.28.06.46.50 for <sandeep.tripathy@linaro.org>; Wed, 28 May 2014 06:46:50 -0700 (PDT) Received-SPF: none (google.com: linux-kernel-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754011AbaE1Nqg (ORCPT <rfc822;sandeep.tripathy@linaro.org> + 27 others); Wed, 28 May 2014 09:46:36 -0400 Received: from mail-wg0-f46.google.com ([74.125.82.46]:60400 "EHLO mail-wg0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753974AbaE1Nqd (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Wed, 28 May 2014 09:46:33 -0400 Received: by mail-wg0-f46.google.com with SMTP id n12so11000034wgh.17 for <linux-kernel@vger.kernel.org>; Wed, 28 May 2014 06:46:32 -0700 (PDT) X-Received: by 10.180.14.72 with SMTP id n8mr48498431wic.53.1401284791894; Wed, 28 May 2014 06:46:31 -0700 (PDT) Received: from srini-ThinkPad-X1-Carbon-2nd.dlink.com (host-78-149-4-211.as13285.net. [78.149.4.211]) by mx.google.com with ESMTPSA id ho2sm17031403wib.15.2014.05.28.06.46.30 for <multiple recipients> (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 28 May 2014 06:46:31 -0700 (PDT) From: srinivas.kandagatla@linaro.org To: Russell King <linux@arm.linux.org.uk>, Ulf Hansson <ulf.hansson@linaro.org>, linux-mmc@vger.kernel.org Cc: Chris Ball <chris@printf.net>, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linus.walleij@linaro.org, Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Subject: [PATCH v4 04/13] mmc: mmci: Add enough delay between writes to CMD register. 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diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index 86f25a9..aa2d381 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -818,7 +818,7 @@ mmci_start_command(struct mmci_host *host, struct mmc_command *cmd, u32 c) if (readl(base + MMCICOMMAND) & MCI_CPSM_ENABLE) { writel(0, base + MMCICOMMAND); - udelay(1); + mmci_reg_delay(host); } c |= cmd->opcode | MCI_CPSM_ENABLE;