Message ID | 1400777250-17335-10-git-send-email-will.deacon@arm.com |
---|---|
State | Superseded |
Headers | show
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[209.132.180.67]) by mx.google.com with ESMTP id og1si425178pbc.150.2014.05.22.09.53.34; Thu, 22 May 2014 09:53:34 -0700 (PDT) Received-SPF: none (google.com: linux-kernel-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753310AbaEVQxE (ORCPT <rfc822;sandeep.tripathy@linaro.org> + 27 others); Thu, 22 May 2014 12:53:04 -0400 Received: from cam-admin0.cambridge.arm.com ([217.140.96.50]:48890 "EHLO cam-admin0.cambridge.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752912AbaEVQsV (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Thu, 22 May 2014 12:48:21 -0400 Received: from edgewater-inn.cambridge.arm.com (edgewater-inn.cambridge.arm.com [10.1.203.25]) by cam-admin0.cambridge.arm.com (8.12.6/8.12.6) with ESMTP id s4MGlZwo028190; Thu, 22 May 2014 17:47:35 +0100 (BST) Received: by edgewater-inn.cambridge.arm.com (Postfix, from userid 1000) id AE6311AE3410; Thu, 22 May 2014 17:47:34 +0100 (BST) From: Will Deacon <will.deacon@arm.com> To: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org Cc: arnd@arndb.de, monstr@monstr.eu, dhowells@redhat.com, broonie@linaro.org, benh@kernel.crashing.org, peterz@infradead.org, paulmck@linux.vnet.ibm.com, Will Deacon <will.deacon@arm.com>, Hirokazu Takata <takata@linux-m32r.org> Subject: [PATCH v2 09/18] m32r: io: implement dummy relaxed accessor macros for writes Date: Thu, 22 May 2014 17:47:21 +0100 Message-Id: <1400777250-17335-10-git-send-email-will.deacon@arm.com> X-Mailer: git-send-email 1.9.2 In-Reply-To: <1400777250-17335-1-git-send-email-will.deacon@arm.com> References: <1400777250-17335-1-git-send-email-will.deacon@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: <patchwork-forward.linaro.org> X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. 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diff --git a/arch/m32r/include/asm/io.h b/arch/m32r/include/asm/io.h index 4010f1fc5b65..6e7787f3dac7 100644 --- a/arch/m32r/include/asm/io.h +++ b/arch/m32r/include/asm/io.h @@ -161,6 +161,9 @@ static inline void _writel(unsigned long l, unsigned long addr) #define __raw_writeb writeb #define __raw_writew writew #define __raw_writel writel +#define writeb_relaxed writeb +#define writew_relaxed writew +#define writel_relaxed writel #define ioread8 read #define ioread16 readw
write{b,w,l}_relaxed are implemented by some architectures in order to permit memory-mapped I/O accesses with weaker barrier semantics than the non-relaxed variants. This patch adds dummy macros for the write accessors to m32r, in the same vein as the dummy definitions for the relaxed read accessors. Cc: Hirokazu Takata <takata@linux-m32r.org> Signed-off-by: Will Deacon <will.deacon@arm.com> --- arch/m32r/include/asm/io.h | 3 +++ 1 file changed, 3 insertions(+)