@@ -31,5 +31,10 @@
ethernet1: dwmac@fef08000 {
snps,reset-gpio = <&PIO0 7>;
};
+
+ miphy365x_phy: miphy365x@fe382000 {
+ st,pcie-tx-pol-inv;
+ st,sata-gen = <3>;
+ };
};
};
@@ -13,4 +13,10 @@
model = "STiH416 B2020";
compatible = "st,stih416", "st,stih416-b2020";
+ soc {
+ miphy365x_phy: miphy365x@fe382000 {
+ st,pcie-tx-pol-inv;
+ st,sata-gen = <3>;
+ };
+ };
};
@@ -9,6 +9,8 @@
#include "stih41x.dtsi"
#include "stih416-clock.dtsi"
#include "stih416-pinctrl.dtsi"
+
+#include <dt-bindings/phy/phy-miphy365x.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/reset-controller/stih416-resets.h>
/ {
@@ -224,5 +226,17 @@
status = "disabled";
};
+
+ miphy365x_phy: miphy365x@fe382000 {
+ compatible = "st,miphy365x-phy";
+ reg = <0xfe382000 0x100>,
+ <0xfe38a000 0x100>,
+ <0xfe394000 0x100>,
+ <0xfe804000 0x100>;
+ reg-names = "sata0", "sata1", "pcie0", "pcie1";
+
+ #phy-cells = <2>;
+ st,syscfg = <&syscfg_rear>;
+ };
};
};