| Message ID | 20200905212415.760452-1-f4bug@amsat.org |
|---|---|
| State | New |
| Headers | show |
| Series | hw/arm/aspeed: Map the UART5 device unconditionally | expand |
ping? On 9/5/20 11:24 PM, Philippe Mathieu-Daudé wrote: > The UART5 is present on the machine regardless there is a > character device connected to it. Map it unconditionally. > > Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> > --- > hw/arm/aspeed_ast2600.c | 8 +++----- > hw/arm/aspeed_soc.c | 8 +++----- > 2 files changed, 6 insertions(+), 10 deletions(-) > > diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c > index 9d95e421435..1450bde7cf2 100644 > --- a/hw/arm/aspeed_ast2600.c > +++ b/hw/arm/aspeed_ast2600.c > @@ -325,11 +325,9 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) > } > > /* UART - attach an 8250 to the IO space as our UART5 */ > - if (serial_hd(0)) { > - qemu_irq uart5 = aspeed_soc_get_irq(s, ASPEED_DEV_UART5); > - serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2, > - uart5, 38400, serial_hd(0), DEVICE_LITTLE_ENDIAN); > - } > + serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2, > + aspeed_soc_get_irq(s, ASPEED_DEV_UART5), > + 38400, serial_hd(0), DEVICE_LITTLE_ENDIAN); > > /* I2C */ > object_property_set_link(OBJECT(&s->i2c), "dram", OBJECT(s->dram_mr), > diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c > index 35be126db6f..7eefd54ac07 100644 > --- a/hw/arm/aspeed_soc.c > +++ b/hw/arm/aspeed_soc.c > @@ -283,11 +283,9 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) > } > > /* UART - attach an 8250 to the IO space as our UART5 */ > - if (serial_hd(0)) { > - qemu_irq uart5 = aspeed_soc_get_irq(s, ASPEED_DEV_UART5); > - serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2, > - uart5, 38400, serial_hd(0), DEVICE_LITTLE_ENDIAN); > - } > + serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2, > + aspeed_soc_get_irq(s, ASPEED_DEV_UART5), 38400, > + serial_hd(0), DEVICE_LITTLE_ENDIAN); > > /* I2C */ > object_property_set_link(OBJECT(&s->i2c), "dram", OBJECT(s->dram_mr), >
On 9/15/20 7:23 PM, Philippe Mathieu-Daudé wrote: > ping? It's reviewed : http://patchwork.ozlabs.org/project/qemu-devel/patch/20200905212415.760452-1-f4bug@amsat.org/ I will send a PR when I have more patches. Thanks, C. > On 9/5/20 11:24 PM, Philippe Mathieu-Daudé wrote: >> The UART5 is present on the machine regardless there is a >> character device connected to it. Map it unconditionally. >> >> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> >> --- >> hw/arm/aspeed_ast2600.c | 8 +++----- >> hw/arm/aspeed_soc.c | 8 +++----- >> 2 files changed, 6 insertions(+), 10 deletions(-) >> >> diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c >> index 9d95e421435..1450bde7cf2 100644 >> --- a/hw/arm/aspeed_ast2600.c >> +++ b/hw/arm/aspeed_ast2600.c >> @@ -325,11 +325,9 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) >> } >> >> /* UART - attach an 8250 to the IO space as our UART5 */ >> - if (serial_hd(0)) { >> - qemu_irq uart5 = aspeed_soc_get_irq(s, ASPEED_DEV_UART5); >> - serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2, >> - uart5, 38400, serial_hd(0), DEVICE_LITTLE_ENDIAN); >> - } >> + serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2, >> + aspeed_soc_get_irq(s, ASPEED_DEV_UART5), >> + 38400, serial_hd(0), DEVICE_LITTLE_ENDIAN); >> >> /* I2C */ >> object_property_set_link(OBJECT(&s->i2c), "dram", OBJECT(s->dram_mr), >> diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c >> index 35be126db6f..7eefd54ac07 100644 >> --- a/hw/arm/aspeed_soc.c >> +++ b/hw/arm/aspeed_soc.c >> @@ -283,11 +283,9 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) >> } >> >> /* UART - attach an 8250 to the IO space as our UART5 */ >> - if (serial_hd(0)) { >> - qemu_irq uart5 = aspeed_soc_get_irq(s, ASPEED_DEV_UART5); >> - serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2, >> - uart5, 38400, serial_hd(0), DEVICE_LITTLE_ENDIAN); >> - } >> + serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2, >> + aspeed_soc_get_irq(s, ASPEED_DEV_UART5), 38400, >> + serial_hd(0), DEVICE_LITTLE_ENDIAN); >> >> /* I2C */ >> object_property_set_link(OBJECT(&s->i2c), "dram", OBJECT(s->dram_mr), >>
On 9/16/20 7:51 AM, Cédric Le Goater wrote: > On 9/15/20 7:23 PM, Philippe Mathieu-Daudé wrote: >> ping? > > It's reviewed : > > http://patchwork.ozlabs.org/project/qemu-devel/patch/20200905212415.760452-1-f4bug@amsat.org/ > Yes I know :) This is part of my routine to check if a patch hasn't been confirmed to be queued 1 week after the last review, to ping the maintainer (because some automatically flush patches older than 1month in their mailbox). > I will send a PR when I have more patches. Ah OK. I didn't know you would keep merging the Aspeed patches. Since this was a single patch, I thought it would go via the usual qemu-arm queue from Peter. No rush, I just wanted to be sure the patch was not lost. Also, once a patch is queued, I understand it is the maintainer responsibility to keep rebasing the patch queued. Thanks! Phil. > > Thanks, > > C. > >> On 9/5/20 11:24 PM, Philippe Mathieu-Daudé wrote: >>> The UART5 is present on the machine regardless there is a >>> character device connected to it. Map it unconditionally. >>> >>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> >>> --- >>> hw/arm/aspeed_ast2600.c | 8 +++----- >>> hw/arm/aspeed_soc.c | 8 +++----- >>> 2 files changed, 6 insertions(+), 10 deletions(-) >>> >>> diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c >>> index 9d95e421435..1450bde7cf2 100644 >>> --- a/hw/arm/aspeed_ast2600.c >>> +++ b/hw/arm/aspeed_ast2600.c >>> @@ -325,11 +325,9 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) >>> } >>> >>> /* UART - attach an 8250 to the IO space as our UART5 */ >>> - if (serial_hd(0)) { >>> - qemu_irq uart5 = aspeed_soc_get_irq(s, ASPEED_DEV_UART5); >>> - serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2, >>> - uart5, 38400, serial_hd(0), DEVICE_LITTLE_ENDIAN); >>> - } >>> + serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2, >>> + aspeed_soc_get_irq(s, ASPEED_DEV_UART5), >>> + 38400, serial_hd(0), DEVICE_LITTLE_ENDIAN); >>> >>> /* I2C */ >>> object_property_set_link(OBJECT(&s->i2c), "dram", OBJECT(s->dram_mr), >>> diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c >>> index 35be126db6f..7eefd54ac07 100644 >>> --- a/hw/arm/aspeed_soc.c >>> +++ b/hw/arm/aspeed_soc.c >>> @@ -283,11 +283,9 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) >>> } >>> >>> /* UART - attach an 8250 to the IO space as our UART5 */ >>> - if (serial_hd(0)) { >>> - qemu_irq uart5 = aspeed_soc_get_irq(s, ASPEED_DEV_UART5); >>> - serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2, >>> - uart5, 38400, serial_hd(0), DEVICE_LITTLE_ENDIAN); >>> - } >>> + serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2, >>> + aspeed_soc_get_irq(s, ASPEED_DEV_UART5), 38400, >>> + serial_hd(0), DEVICE_LITTLE_ENDIAN); >>> >>> /* I2C */ >>> object_property_set_link(OBJECT(&s->i2c), "dram", OBJECT(s->dram_mr), >>> > >
On 9/17/20 6:57 PM, Philippe Mathieu-Daudé wrote: > On 9/16/20 7:51 AM, Cédric Le Goater wrote: >> On 9/15/20 7:23 PM, Philippe Mathieu-Daudé wrote: >>> ping? >> >> It's reviewed : >> >> http://patchwork.ozlabs.org/project/qemu-devel/patch/20200905212415.760452-1-f4bug@amsat.org/ >> > > Yes I know :) This is part of my routine to check if a > patch hasn't been confirmed to be queued 1 week after the > last review, to ping the maintainer (because some > automatically flush patches older than 1month in their > mailbox). ooh. That's brutal. >> I will send a PR when I have more patches. > > Ah OK. I didn't know you would keep merging the Aspeed > patches. Since this was a single patch, I thought it would > go via the usual qemu-arm queue from Peter. sure. It could also. Fine with me. I have only three for the moment. > No rush, I just wanted to be sure the patch was not lost. > Also, once a patch is queued, I understand it is the > maintainer responsibility to keep rebasing the patch > queued. yes. I know. I have been taking care of Andrew's ADC patches since 2017 ... cough cough :) Cheers, C.
On Fri, 18 Sep 2020, at 02:33, Cédric Le Goater wrote: > On 9/17/20 6:57 PM, Philippe Mathieu-Daudé wrote: > > On 9/16/20 7:51 AM, Cédric Le Goater wrote: > >> On 9/15/20 7:23 PM, Philippe Mathieu-Daudé wrote: > >>> ping? > >> > >> It's reviewed : > >> > >> http://patchwork.ozlabs.org/project/qemu-devel/patch/20200905212415.760452-1-f4bug@amsat.org/ > >> > > > > Yes I know :) This is part of my routine to check if a > > patch hasn't been confirmed to be queued 1 week after the > > last review, to ping the maintainer (because some > > automatically flush patches older than 1month in their > > mailbox). > > ooh. That's brutal. > > >> I will send a PR when I have more patches. > > > > Ah OK. I didn't know you would keep merging the Aspeed > > patches. Since this was a single patch, I thought it would > > go via the usual qemu-arm queue from Peter. > > sure. It could also. Fine with me. I have only three for the > moment. > > > No rush, I just wanted to be sure the patch was not lost. > > Also, once a patch is queued, I understand it is the > > maintainer responsibility to keep rebasing the patch > > queued. > > yes. I know. I have been taking care of Andrew's ADC patches > since 2017 ... cough cough :) Agh!
On 9/30/20 7:29 AM, Andrew Jeffery wrote: > > > On Fri, 18 Sep 2020, at 02:33, Cédric Le Goater wrote: >> On 9/17/20 6:57 PM, Philippe Mathieu-Daudé wrote: >>> On 9/16/20 7:51 AM, Cédric Le Goater wrote: >>>> On 9/15/20 7:23 PM, Philippe Mathieu-Daudé wrote: >>>>> ping? >>>> >>>> It's reviewed : >>>> >>>> http://patchwork.ozlabs.org/project/qemu-devel/patch/20200905212415.760452-1-f4bug@amsat.org/ >>>> >>> >>> Yes I know :) This is part of my routine to check if a >>> patch hasn't been confirmed to be queued 1 week after the >>> last review, to ping the maintainer (because some >>> automatically flush patches older than 1month in their >>> mailbox). >> >> ooh. That's brutal. >> >>>> I will send a PR when I have more patches. >>> >>> Ah OK. I didn't know you would keep merging the Aspeed >>> patches. Since this was a single patch, I thought it would >>> go via the usual qemu-arm queue from Peter. >> >> sure. It could also. Fine with me. I have only three for the >> moment. >> >>> No rush, I just wanted to be sure the patch was not lost. >>> Also, once a patch is queued, I understand it is the >>> maintainer responsibility to keep rebasing the patch >>> queued. >> >> yes. I know. I have been taking care of Andrew's ADC patches >> since 2017 ... cough cough :) > > Agh! Does that mean "I will work on it !" ? :) C.
On Wed, 30 Sep 2020, at 19:37, Cédric Le Goater wrote: > On 9/30/20 7:29 AM, Andrew Jeffery wrote: > > > > > > On Fri, 18 Sep 2020, at 02:33, Cédric Le Goater wrote: > >> On 9/17/20 6:57 PM, Philippe Mathieu-Daudé wrote: > >>> On 9/16/20 7:51 AM, Cédric Le Goater wrote: > >>>> On 9/15/20 7:23 PM, Philippe Mathieu-Daudé wrote: > >>>>> ping? > >>>> > >>>> It's reviewed : > >>>> > >>>> http://patchwork.ozlabs.org/project/qemu-devel/patch/20200905212415.760452-1-f4bug@amsat.org/ > >>>> > >>> > >>> Yes I know :) This is part of my routine to check if a > >>> patch hasn't been confirmed to be queued 1 week after the > >>> last review, to ping the maintainer (because some > >>> automatically flush patches older than 1month in their > >>> mailbox). > >> > >> ooh. That's brutal. > >> > >>>> I will send a PR when I have more patches. > >>> > >>> Ah OK. I didn't know you would keep merging the Aspeed > >>> patches. Since this was a single patch, I thought it would > >>> go via the usual qemu-arm queue from Peter. > >> > >> sure. It could also. Fine with me. I have only three for the > >> moment. > >> > >>> No rush, I just wanted to be sure the patch was not lost. > >>> Also, once a patch is queued, I understand it is the > >>> maintainer responsibility to keep rebasing the patch > >>> queued. > >> > >> yes. I know. I have been taking care of Andrew's ADC patches > >> since 2017 ... cough cough :) > > > > Agh! > > Does that mean "I will work on it !" ? :) I'll see what I can do, I've recently started to rearrange my task queue. Andrew
diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c index 9d95e421435..1450bde7cf2 100644 --- a/hw/arm/aspeed_ast2600.c +++ b/hw/arm/aspeed_ast2600.c @@ -325,11 +325,9 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) } /* UART - attach an 8250 to the IO space as our UART5 */ - if (serial_hd(0)) { - qemu_irq uart5 = aspeed_soc_get_irq(s, ASPEED_DEV_UART5); - serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2, - uart5, 38400, serial_hd(0), DEVICE_LITTLE_ENDIAN); - } + serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2, + aspeed_soc_get_irq(s, ASPEED_DEV_UART5), + 38400, serial_hd(0), DEVICE_LITTLE_ENDIAN); /* I2C */ object_property_set_link(OBJECT(&s->i2c), "dram", OBJECT(s->dram_mr), diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c index 35be126db6f..7eefd54ac07 100644 --- a/hw/arm/aspeed_soc.c +++ b/hw/arm/aspeed_soc.c @@ -283,11 +283,9 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) } /* UART - attach an 8250 to the IO space as our UART5 */ - if (serial_hd(0)) { - qemu_irq uart5 = aspeed_soc_get_irq(s, ASPEED_DEV_UART5); - serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2, - uart5, 38400, serial_hd(0), DEVICE_LITTLE_ENDIAN); - } + serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2, + aspeed_soc_get_irq(s, ASPEED_DEV_UART5), 38400, + serial_hd(0), DEVICE_LITTLE_ENDIAN); /* I2C */ object_property_set_link(OBJECT(&s->i2c), "dram", OBJECT(s->dram_mr),
The UART5 is present on the machine regardless there is a character device connected to it. Map it unconditionally. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> --- hw/arm/aspeed_ast2600.c | 8 +++----- hw/arm/aspeed_soc.c | 8 +++----- 2 files changed, 6 insertions(+), 10 deletions(-)