@@ -1308,7 +1308,7 @@ static const struct msm_pingroup sm8250_groups[] = {
[178] = PINGROUP(178, WEST, _, _, _, _, _, _, _, _, _),
[179] = PINGROUP(179, WEST, _, _, _, _, _, _, _, _, _),
[180] = UFS_RESET(ufs_reset, 0xb8000),
- [181] = SDC_PINGROUP(sdc2_clk, 0x7000, 14, 6),
+ [181] = SDC_PINGROUP(sdc2_clk, 0xb7000, 14, 6),
[182] = SDC_PINGROUP(sdc2_cmd, 0xb7000, 11, 3),
[183] = SDC_PINGROUP(sdc2_data, 0xb7000, 9, 0),
};
@@ -1320,7 +1320,7 @@ static const struct msm_pinctrl_soc_data sm8250_pinctrl = {
.nfunctions = ARRAY_SIZE(sm8250_functions),
.groups = sm8250_groups,
.ngroups = ARRAY_SIZE(sm8250_groups),
- .ngpios = 181,
+ .ngpios = 180,
.tiles = sm8250_tiles,
.ntiles = ARRAY_SIZE(sm8250_tiles),
};
Correct sdc2_clk pin definition (register offset) and ngpios (SM8250 has 180 GPIO pins). Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Fixes: 4e3ec9e407ad5058003309072b37111f7b8c900a --- drivers/pinctrl/qcom/pinctrl-sm8250.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)