diff mbox

[PULL,24/51] target-arm: Implement AArch64 view of ACTLR

Message ID 1397730846-7576-25-git-send-email-peter.maydell@linaro.org
State Accepted
Commit 2eef0bf82146034f756d39cb02c8c8dd561a8942
Headers show

Commit Message

Peter Maydell April 17, 2014, 10:33 a.m. UTC 
Implement the AArch64 view of the ACTLR (auxiliary control
register). Note that QEMU internally tends to call this
AUXCR for historical reasons.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
---
 target-arm/helper.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)
diff mbox

Patch

diff --git a/target-arm/helper.c b/target-arm/helper.c
index 10300aa..32af1df 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -2316,7 +2316,8 @@  void register_cp_regs_for_features(ARMCPU *cpu)
 
     if (arm_feature(env, ARM_FEATURE_AUXCR)) {
         ARMCPRegInfo auxcr = {
-            .name = "AUXCR", .cp = 15, .crn = 1, .crm = 0, .opc1 = 0, .opc2 = 1,
+            .name = "ACTLR_EL1", .state = ARM_CP_STATE_BOTH,
+            .opc0 = 3, .opc1 = 0, .crn = 1, .crm = 0, .opc2 = 1,
             .access = PL1_RW, .type = ARM_CP_CONST,
             .resetvalue = cpu->reset_auxcr
         };