Message ID | alpine.DEB.2.21.2005010037350.30535@digraph.polyomino.org.uk |
---|---|
State | New |
Headers | show |
Series | None | expand |
diff --git a/fpu/softfloat.c b/fpu/softfloat.c index ac116c70b8..6094d267b5 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -5866,6 +5866,12 @@ static floatx80 addFloatx80Sigs(floatx80 a, floatx80 b, flag zSign, zSig1 = 0; zSig0 = aSig + bSig; if ( aExp == 0 ) { + if ((aSig | bSig) & UINT64_C(0x8000000000000000) && zSig0 < aSig) { + /* At least one of the values is a pseudo-denormal, + * and there is a carry out of the result. */ + zExp = 1; + goto shiftRight1; + } if (zSig0 == 0) { return packFloatx80(zSign, 0, 0); }
The softfloat function addFloatx80Sigs, used for addition of values with the same sign and subtraction of values with opposite sign, fails to handle the case where the two values both have biased exponent zero and there is a carry resulting from adding the significands, which can occur if one or both values are pseudo-denormals (biased exponent zero, explicit integer bit 1). Add a check for that case, so making the results match those seen on x86 hardware for pseudo-denormals. Signed-off-by: Joseph Myers <joseph@codesourcery.com> --- fpu/softfloat.c | 6 ++++++ 1 file changed, 6 insertions(+)