@@ -34,6 +34,7 @@
#include "hw/input/adb.h"
#include "sysemu/sysemu.h"
#include "net/net.h"
+#include "hw/i2c/smbus_eeprom.h"
#include "hw/isa/isa.h"
#include "hw/pci/pci.h"
#include "hw/pci/pci_host.h"
@@ -133,6 +134,8 @@ static void ppc_heathrow_init(MachineState *machine)
DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
void *fw_cfg;
uint64_t tbfreq;
+ uint8_t *spd_data[3] = {};
+ I2CBus *i2c_bus;
/* init CPUs */
for (i = 0; i < smp_cpus; i++) {
@@ -150,8 +153,16 @@ static void ppc_heathrow_init(MachineState *machine)
"maximum 2047 MB", ram_size / MiB);
exit(1);
}
-
memory_region_add_subregion(get_system_memory(), 0, machine->ram);
+ for (i = 0; i < 3; i++) {
+ int size_left = ram_size - i * 512 * MiB;
+ if (size_left > 0) {
+ uint32_t s = size_left / MiB;
+ s = (s > 512 ? 512 : s);
+ s = 1U << (31 - clz32(s));
+ spd_data[i] = spd_data_generate(SDR, s * MiB);
+ }
+ }
/* allocate and load firmware ROM */
memory_region_init_rom(bios, NULL, "ppc_heathrow.bios", PROM_SIZE,
@@ -337,6 +348,12 @@ static void ppc_heathrow_init(MachineState *machine)
macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]);
dev = DEVICE(object_resolve_path_component(OBJECT(macio), "cuda"));
+ i2c_bus = I2C_BUS(qdev_get_child_bus(dev, "i2c"));
+ for (i = 0; i < 3; i++) {
+ if (spd_data[i]) {
+ smbus_eeprom_init_one(i2c_bus, 0x50 + i, spd_data[i]);
+ }
+ }
adb_bus = qdev_get_child_bus(dev, "adb.0");
dev = qdev_new(TYPE_ADB_KEYBOARD);
qdev_realize_and_unref(dev, adb_bus, &error_fatal);
OpenBIOS gets RAM size via fw_cfg but rhe original board firmware detects RAM using SPD data so generate and add SDP eeproms to cover as much RAM as possible to describe with SPD (this may be less than the actual ram_size due to SDRAM size constraints). Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> --- hw/ppc/mac_oldworld.c | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-)