Message ID | 20200901140954.889743-37-laurent@vivier.eu |
---|---|
State | New |
Headers | show
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Tue, 01 Sep 2020 16:10:21 +0200 From: Laurent Vivier <laurent@vivier.eu> To: qemu-devel@nongnu.org Subject: [PULL 36/44] target/arm/translate-a64:Remove redundant statement in disas_simd_two_reg_misc_fp16() Date: Tue, 1 Sep 2020 16:09:46 +0200 Message-Id: <20200901140954.889743-37-laurent@vivier.eu> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200901140954.889743-1-laurent@vivier.eu> References: <20200901140954.889743-1-laurent@vivier.eu> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Provags-ID: V03:K1:Se1aBbOJhO0bgrfhpYnwe20MluVmTL6jT+pVjZM/pAm3vTbgo+j ILqCMotw5/eAM/jbR/NH+F2+1tNZTdCshjUbZk/wDqAF7WN6lN23f0TbjAq6mxnoPRA4Qn1 jbRpqn1baoaOyi6ODweAlaMJULAugd4AuURr+nVJZHMgm7WroS5er1Grke6GZXvm0L7Qsmw EV+dYhUDhKJvA3m1R8GYw== X-UI-Out-Filterresults: notjunk:1; V03:K0:1B2d3lJ4w/A=:C6vvJh6M68fBAqFZ09tqA4 6cUbZejz9V/IM7TlK/ngg0xZrM1G6Ov898oEX6LntS90J112++ZvGCMwWTZ0CFOVT8G+jJ8f0 ScNcohjHS95I8jVsi4tAhc/Kz7Wcf9LqAW91EY5//KJA4gSWushdTcaTzgbZu/GL1b3xbJdrX ZSUgUOWB6lAg01PHqJKN2mr3RfCiRRVrHCqbpUGzGuP5QplllbZx3ALOJo8FYjlcNdm+ue4Kq ylAWreaITwCVHciCwrEt6CUV9yfQelb20bhOoYB/sf4kohKaNvwqrUB2KjlT0rnTY1Nj0OS6r o2GRhVW05nM8BKF2RAVjHcoPRIb8hufNeQYlpsVwmThyWjHJyUhoAyS/fTiVUS1FMcTF+wUkM fsBtHjBKzxnNAShpPnXym57RRgrimRJ3vQgiHIiwVY8Wnj+Vxsp2UOf6SablEyTA1g8VLhpKc gdic/1WzNS8sB3977BCwremVAyGrld/1fYaZaY25uYKHixGIqb57Dh2jN3cb48244q0yDeyTS 2lJYL4m1UlhxpoiM8zfuM9szI97ra5vBEh8oPMv9SeBm8g371931FH3zTgOxigD75VJYhZplb Ryd5ocH7svGkXjHIBrRk5UoKMSNBH400WLaRBJStQw3L5uDbNUQFDrS2+yn7+31uJYEc9Xjsv uGkEjCP5WEAE/ig8Ct91eRU4ysocRmdYeOisvKNo194y00AS039g5joOV8SOyWCKO0V5V1mpQ myU/guO7X7pW02oC9g0Mkd52hH68P9ighpvOTCT7PfLIX0A504mxbsEKpsLwIJrrSfWosnym3 8Y6TNUO6DQ2l2yF6ylwgu/1shNskK7mFdhZ+0z6yeGE3L8glyynP2xyfmMY5jTAu/dqPZnS Received-SPF: none client-ip=212.227.126.187; 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Series |
[PULL,01/44] hw/register: Document register_init_block @memory_size
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diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 1fc3b2273207..71888083417d 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -13014,9 +13014,6 @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn) fpop = deposit32(opcode, 5, 1, a); fpop = deposit32(fpop, 6, 1, u); - rd = extract32(insn, 0, 5); - rn = extract32(insn, 5, 5); - switch (fpop) { case 0x1d: /* SCVTF */ case 0x5d: /* UCVTF */