diff mbox series

[v2,3/5] hw/timer/bcm2835: Rename variable holding CTRL_STATUS register

Message ID 20200921035257.434532-4-f4bug@amsat.org
State Superseded
Headers show
Series hw/arm/raspi: Fix SYS_timer to unbrick Linux kernels v3.7+ | expand

Commit Message

Philippe Mathieu-Daudé Sept. 21, 2020, 3:52 a.m. UTC
The variable holding the CTRL_STATUS register is misnamed
'status'. Rename it 'ctrl_status' to make it more obvious
this register is also used to control the peripheral.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 include/hw/timer/bcm2835_systmr.h | 2 +-
 hw/timer/bcm2835_systmr.c         | 8 ++++----
 2 files changed, 5 insertions(+), 5 deletions(-)

Comments

Luc Michel Sept. 21, 2020, 7:44 p.m. UTC | #1
On 9/21/20 5:52 AM, Philippe Mathieu-Daudé wrote:
> The variable holding the CTRL_STATUS register is misnamed
> 'status'. Rename it 'ctrl_status' to make it more obvious
> this register is also used to control the peripheral.
> 
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Reviewed-by: Luc Michel <luc.michel@greensocs.com>

> ---
>   include/hw/timer/bcm2835_systmr.h | 2 +-
>   hw/timer/bcm2835_systmr.c         | 8 ++++----
>   2 files changed, 5 insertions(+), 5 deletions(-)
> 
> diff --git a/include/hw/timer/bcm2835_systmr.h b/include/hw/timer/bcm2835_systmr.h
> index 11272837a6b..e0db9e9e12b 100644
> --- a/include/hw/timer/bcm2835_systmr.h
> +++ b/include/hw/timer/bcm2835_systmr.h
> @@ -29,7 +29,7 @@ struct BCM2835SystemTimerState {
>       qemu_irq irq;
>   
>       struct {
> -        uint32_t status;
> +        uint32_t ctrl_status;
>           uint32_t compare[BCM2835_SYSTIMER_COUNT];
>       } reg;
>   };
> diff --git a/hw/timer/bcm2835_systmr.c b/hw/timer/bcm2835_systmr.c
> index ff8c5536610..b234e83824f 100644
> --- a/hw/timer/bcm2835_systmr.c
> +++ b/hw/timer/bcm2835_systmr.c
> @@ -30,7 +30,7 @@ REG32(COMPARE3,     0x18)
>   
>   static void bcm2835_systmr_update_irq(BCM2835SystemTimerState *s)
>   {
> -    bool enable = !!s->reg.status;
> +    bool enable = !!s->reg.ctrl_status;
>   
>       trace_bcm2835_systmr_irq(enable);
>       qemu_set_irq(s->irq, enable);
> @@ -52,7 +52,7 @@ static uint64_t bcm2835_systmr_read(void *opaque, hwaddr offset,
>   
>       switch (offset) {
>       case A_CTRL_STATUS:
> -        r = s->reg.status;
> +        r = s->reg.ctrl_status;
>           break;
>       case A_COMPARE0 ... A_COMPARE3:
>           r = s->reg.compare[(offset - A_COMPARE0) >> 2];
> @@ -82,7 +82,7 @@ static void bcm2835_systmr_write(void *opaque, hwaddr offset,
>       trace_bcm2835_systmr_write(offset, value);
>       switch (offset) {
>       case A_CTRL_STATUS:
> -        s->reg.status &= ~value; /* Ack */
> +        s->reg.ctrl_status &= ~value; /* Ack */
>           bcm2835_systmr_update_irq(s);
>           break;
>       case A_COMPARE0 ... A_COMPARE3:
> @@ -133,7 +133,7 @@ static const VMStateDescription bcm2835_systmr_vmstate = {
>       .version_id = 1,
>       .minimum_version_id = 1,
>       .fields = (VMStateField[]) {
> -        VMSTATE_UINT32(reg.status, BCM2835SystemTimerState),
> +        VMSTATE_UINT32(reg.ctrl_status, BCM2835SystemTimerState),
>           VMSTATE_UINT32_ARRAY(reg.compare, BCM2835SystemTimerState,
>                                BCM2835_SYSTIMER_COUNT),
>           VMSTATE_END_OF_LIST()
>
diff mbox series

Patch

diff --git a/include/hw/timer/bcm2835_systmr.h b/include/hw/timer/bcm2835_systmr.h
index 11272837a6b..e0db9e9e12b 100644
--- a/include/hw/timer/bcm2835_systmr.h
+++ b/include/hw/timer/bcm2835_systmr.h
@@ -29,7 +29,7 @@  struct BCM2835SystemTimerState {
     qemu_irq irq;
 
     struct {
-        uint32_t status;
+        uint32_t ctrl_status;
         uint32_t compare[BCM2835_SYSTIMER_COUNT];
     } reg;
 };
diff --git a/hw/timer/bcm2835_systmr.c b/hw/timer/bcm2835_systmr.c
index ff8c5536610..b234e83824f 100644
--- a/hw/timer/bcm2835_systmr.c
+++ b/hw/timer/bcm2835_systmr.c
@@ -30,7 +30,7 @@  REG32(COMPARE3,     0x18)
 
 static void bcm2835_systmr_update_irq(BCM2835SystemTimerState *s)
 {
-    bool enable = !!s->reg.status;
+    bool enable = !!s->reg.ctrl_status;
 
     trace_bcm2835_systmr_irq(enable);
     qemu_set_irq(s->irq, enable);
@@ -52,7 +52,7 @@  static uint64_t bcm2835_systmr_read(void *opaque, hwaddr offset,
 
     switch (offset) {
     case A_CTRL_STATUS:
-        r = s->reg.status;
+        r = s->reg.ctrl_status;
         break;
     case A_COMPARE0 ... A_COMPARE3:
         r = s->reg.compare[(offset - A_COMPARE0) >> 2];
@@ -82,7 +82,7 @@  static void bcm2835_systmr_write(void *opaque, hwaddr offset,
     trace_bcm2835_systmr_write(offset, value);
     switch (offset) {
     case A_CTRL_STATUS:
-        s->reg.status &= ~value; /* Ack */
+        s->reg.ctrl_status &= ~value; /* Ack */
         bcm2835_systmr_update_irq(s);
         break;
     case A_COMPARE0 ... A_COMPARE3:
@@ -133,7 +133,7 @@  static const VMStateDescription bcm2835_systmr_vmstate = {
     .version_id = 1,
     .minimum_version_id = 1,
     .fields = (VMStateField[]) {
-        VMSTATE_UINT32(reg.status, BCM2835SystemTimerState),
+        VMSTATE_UINT32(reg.ctrl_status, BCM2835SystemTimerState),
         VMSTATE_UINT32_ARRAY(reg.compare, BCM2835SystemTimerState,
                              BCM2835_SYSTIMER_COUNT),
         VMSTATE_END_OF_LIST()