| Message ID | 4f272c9fab34bedc34b22adb8f9e2fb2dbd338d2.1601652616.git.alistair.francis@wdc.com |
|---|---|
| State | New |
| Headers | show |
| Series | Allow loading a no MMU kernel | expand |
On Fri, Oct 2, 2020 at 11:55 PM Alistair Francis <alistair.francis@wdc.com> wrote: Please put some commit message to explain why the changes are necessary. > > Signed-off-by: Alistair Francis <alistair.francis@wdc.com> > --- > include/hw/riscv/boot.h | 1 + > hw/riscv/boot.c | 10 +++++----- > hw/riscv/opentitan.c | 3 ++- > hw/riscv/sifive_e.c | 3 ++- > hw/riscv/sifive_u.c | 13 +++++++++++-- > hw/riscv/spike.c | 14 +++++++++++--- > hw/riscv/virt.c | 14 +++++++++++--- > 7 files changed, 43 insertions(+), 15 deletions(-) > > diff --git a/include/hw/riscv/boot.h b/include/hw/riscv/boot.h > index 2975ed1a31..85d3227ea6 100644 > --- a/include/hw/riscv/boot.h > +++ b/include/hw/riscv/boot.h > @@ -34,6 +34,7 @@ target_ulong riscv_load_firmware(const char *firmware_filename, > hwaddr firmware_load_addr, > symbol_fn_t sym_cb); > target_ulong riscv_load_kernel(const char *kernel_filename, > + target_ulong firmware_end_addr, > symbol_fn_t sym_cb); > hwaddr riscv_load_initrd(const char *filename, uint64_t mem_size, > uint64_t kernel_entry, hwaddr *start); > diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c > index 5dea644f47..f8e55ca16a 100644 > --- a/hw/riscv/boot.c > +++ b/hw/riscv/boot.c > @@ -33,10 +33,8 @@ > #include <libfdt.h> > > #if defined(TARGET_RISCV32) > -# define KERNEL_BOOT_ADDRESS 0x80400000 > #define fw_dynamic_info_data(__val) cpu_to_le32(__val) > #else > -# define KERNEL_BOOT_ADDRESS 0x80200000 > #define fw_dynamic_info_data(__val) cpu_to_le64(__val) > #endif > > @@ -123,7 +121,9 @@ target_ulong riscv_load_firmware(const char *firmware_filename, > exit(1); > } > > -target_ulong riscv_load_kernel(const char *kernel_filename, symbol_fn_t sym_cb) > +target_ulong riscv_load_kernel(const char *kernel_filename, > + target_ulong kernel_start_addr, > + symbol_fn_t sym_cb) > { > uint64_t kernel_entry; > > @@ -138,9 +138,9 @@ target_ulong riscv_load_kernel(const char *kernel_filename, symbol_fn_t sym_cb) > return kernel_entry; > } > > - if (load_image_targphys_as(kernel_filename, KERNEL_BOOT_ADDRESS, > + if (load_image_targphys_as(kernel_filename, kernel_start_addr, > ram_size, NULL) > 0) { > - return KERNEL_BOOT_ADDRESS; > + return kernel_start_addr; > } > > error_report("could not load kernel '%s'", kernel_filename); > diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c > index 0531bd879b..cc758b78b8 100644 > --- a/hw/riscv/opentitan.c > +++ b/hw/riscv/opentitan.c > @@ -75,7 +75,8 @@ static void opentitan_board_init(MachineState *machine) > } > > if (machine->kernel_filename) { > - riscv_load_kernel(machine->kernel_filename, NULL); > + riscv_load_kernel(machine->kernel_filename, > + memmap[IBEX_DEV_RAM].base, NULL); > } > } > > diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c > index fcfac16816..59bac4cc9a 100644 > --- a/hw/riscv/sifive_e.c > +++ b/hw/riscv/sifive_e.c > @@ -114,7 +114,8 @@ static void sifive_e_machine_init(MachineState *machine) > memmap[SIFIVE_E_DEV_MROM].base, &address_space_memory); > > if (machine->kernel_filename) { > - riscv_load_kernel(machine->kernel_filename, NULL); > + riscv_load_kernel(machine->kernel_filename, > + memmap[SIFIVE_E_DEV_DTIM].base, NULL); > } > } > > diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c > index 5f3ad9bc0f..08b0a3937d 100644 > --- a/hw/riscv/sifive_u.c > +++ b/hw/riscv/sifive_u.c > @@ -415,6 +415,7 @@ static void sifive_u_machine_init(MachineState *machine) > MemoryRegion *main_mem = g_new(MemoryRegion, 1); > MemoryRegion *flash0 = g_new(MemoryRegion, 1); > target_ulong start_addr = memmap[SIFIVE_U_DEV_DRAM].base; > + target_ulong firmware_end_addr, kernel_start_addr; > uint32_t start_addr_hi32 = 0x00000000; > int i; > uint32_t fdt_load_addr; > @@ -474,10 +475,18 @@ static void sifive_u_machine_init(MachineState *machine) > break; > } > > - riscv_find_and_load_firmware(machine, BIOS_FILENAME, start_addr, NULL); > + firmware_end_addr = riscv_find_and_load_firmware(machine, BIOS_FILENAME, > + start_addr, NULL); > > if (machine->kernel_filename) { > - kernel_entry = riscv_load_kernel(machine->kernel_filename, NULL); > + if (riscv_is_32_bit(machine)) { > + kernel_start_addr = QEMU_ALIGN_UP(firmware_end_addr, 0x400000); Use 4 * MiB > + } else { > + kernel_start_addr = QEMU_ALIGN_UP(firmware_end_addr, 0x200000); 2 * MiB > + } > + > + kernel_entry = riscv_load_kernel(machine->kernel_filename, > + kernel_start_addr, NULL); > > if (machine->initrd_filename) { > hwaddr start; > diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c > index 3fd152a035..280fb1f328 100644 > --- a/hw/riscv/spike.c > +++ b/hw/riscv/spike.c > @@ -195,6 +195,7 @@ static void spike_board_init(MachineState *machine) > MemoryRegion *system_memory = get_system_memory(); > MemoryRegion *main_mem = g_new(MemoryRegion, 1); > MemoryRegion *mask_rom = g_new(MemoryRegion, 1); > + target_ulong firmware_end_addr, kernel_start_addr; > uint32_t fdt_load_addr; > uint64_t kernel_entry; > char *soc_name; > @@ -261,12 +262,19 @@ static void spike_board_init(MachineState *machine) > memory_region_add_subregion(system_memory, memmap[SPIKE_MROM].base, > mask_rom); > > - riscv_find_and_load_firmware(machine, BIOS_FILENAME, > - memmap[SPIKE_DRAM].base, > - htif_symbol_callback); > + firmware_end_addr = riscv_find_and_load_firmware(machine, BIOS_FILENAME, > + memmap[SPIKE_DRAM].base, > + htif_symbol_callback); > > if (machine->kernel_filename) { > + if (riscv_is_32_bit(machine)) { > + kernel_start_addr = QEMU_ALIGN_UP(firmware_end_addr, 0x400000); Ditto It looks like this same code logic is added in several machine codes, perhaps a new helper function in riscv/boot.c is needed to determine the kernel start address based on the firmware end address. > + } else { > + kernel_start_addr = QEMU_ALIGN_UP(firmware_end_addr, 0x200000); > + } > + > kernel_entry = riscv_load_kernel(machine->kernel_filename, > + kernel_start_addr, > htif_symbol_callback); > > if (machine->initrd_filename) { > diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c > index 41bd2f38ba..bf22d28eef 100644 > --- a/hw/riscv/virt.c > +++ b/hw/riscv/virt.c > @@ -493,6 +493,7 @@ static void virt_machine_init(MachineState *machine) > char *plic_hart_config, *soc_name; > size_t plic_hart_config_len; > target_ulong start_addr = memmap[VIRT_DRAM].base; > + target_ulong firmware_end_addr, kernel_start_addr; > uint32_t fdt_load_addr; > uint64_t kernel_entry; > DeviceState *mmio_plic, *virtio_plic, *pcie_plic; > @@ -602,11 +603,18 @@ static void virt_machine_init(MachineState *machine) > memory_region_add_subregion(system_memory, memmap[VIRT_MROM].base, > mask_rom); > > - riscv_find_and_load_firmware(machine, BIOS_FILENAME, > - memmap[VIRT_DRAM].base, NULL); > + firmware_end_addr = riscv_find_and_load_firmware(machine, BIOS_FILENAME, > + start_addr, NULL); > > if (machine->kernel_filename) { > - kernel_entry = riscv_load_kernel(machine->kernel_filename, NULL); > + if (riscv_is_32_bit(machine)) { > + kernel_start_addr = QEMU_ALIGN_UP(firmware_end_addr, 0x400000); > + } else { > + kernel_start_addr = QEMU_ALIGN_UP(firmware_end_addr, 0x200000); > + } > + > + kernel_entry = riscv_load_kernel(machine->kernel_filename, > + kernel_start_addr, NULL); > > if (machine->initrd_filename) { > hwaddr start; Regards, Bin
On Fri, Oct 9, 2020 at 3:29 AM Bin Meng <bmeng.cn@gmail.com> wrote: > > On Fri, Oct 2, 2020 at 11:55 PM Alistair Francis > <alistair.francis@wdc.com> wrote: > > Please put some commit message to explain why the changes are necessary. I have added a commit message. > > > > > Signed-off-by: Alistair Francis <alistair.francis@wdc.com> > > --- > > include/hw/riscv/boot.h | 1 + > > hw/riscv/boot.c | 10 +++++----- > > hw/riscv/opentitan.c | 3 ++- > > hw/riscv/sifive_e.c | 3 ++- > > hw/riscv/sifive_u.c | 13 +++++++++++-- > > hw/riscv/spike.c | 14 +++++++++++--- > > hw/riscv/virt.c | 14 +++++++++++--- > > 7 files changed, 43 insertions(+), 15 deletions(-) > > > > diff --git a/include/hw/riscv/boot.h b/include/hw/riscv/boot.h > > index 2975ed1a31..85d3227ea6 100644 > > --- a/include/hw/riscv/boot.h > > +++ b/include/hw/riscv/boot.h > > @@ -34,6 +34,7 @@ target_ulong riscv_load_firmware(const char *firmware_filename, > > hwaddr firmware_load_addr, > > symbol_fn_t sym_cb); > > target_ulong riscv_load_kernel(const char *kernel_filename, > > + target_ulong firmware_end_addr, > > symbol_fn_t sym_cb); > > hwaddr riscv_load_initrd(const char *filename, uint64_t mem_size, > > uint64_t kernel_entry, hwaddr *start); > > diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c > > index 5dea644f47..f8e55ca16a 100644 > > --- a/hw/riscv/boot.c > > +++ b/hw/riscv/boot.c > > @@ -33,10 +33,8 @@ > > #include <libfdt.h> > > > > #if defined(TARGET_RISCV32) > > -# define KERNEL_BOOT_ADDRESS 0x80400000 > > #define fw_dynamic_info_data(__val) cpu_to_le32(__val) > > #else > > -# define KERNEL_BOOT_ADDRESS 0x80200000 > > #define fw_dynamic_info_data(__val) cpu_to_le64(__val) > > #endif > > > > @@ -123,7 +121,9 @@ target_ulong riscv_load_firmware(const char *firmware_filename, > > exit(1); > > } > > > > -target_ulong riscv_load_kernel(const char *kernel_filename, symbol_fn_t sym_cb) > > +target_ulong riscv_load_kernel(const char *kernel_filename, > > + target_ulong kernel_start_addr, > > + symbol_fn_t sym_cb) > > { > > uint64_t kernel_entry; > > > > @@ -138,9 +138,9 @@ target_ulong riscv_load_kernel(const char *kernel_filename, symbol_fn_t sym_cb) > > return kernel_entry; > > } > > > > - if (load_image_targphys_as(kernel_filename, KERNEL_BOOT_ADDRESS, > > + if (load_image_targphys_as(kernel_filename, kernel_start_addr, > > ram_size, NULL) > 0) { > > - return KERNEL_BOOT_ADDRESS; > > + return kernel_start_addr; > > } > > > > error_report("could not load kernel '%s'", kernel_filename); > > diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c > > index 0531bd879b..cc758b78b8 100644 > > --- a/hw/riscv/opentitan.c > > +++ b/hw/riscv/opentitan.c > > @@ -75,7 +75,8 @@ static void opentitan_board_init(MachineState *machine) > > } > > > > if (machine->kernel_filename) { > > - riscv_load_kernel(machine->kernel_filename, NULL); > > + riscv_load_kernel(machine->kernel_filename, > > + memmap[IBEX_DEV_RAM].base, NULL); > > } > > } > > > > diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c > > index fcfac16816..59bac4cc9a 100644 > > --- a/hw/riscv/sifive_e.c > > +++ b/hw/riscv/sifive_e.c > > @@ -114,7 +114,8 @@ static void sifive_e_machine_init(MachineState *machine) > > memmap[SIFIVE_E_DEV_MROM].base, &address_space_memory); > > > > if (machine->kernel_filename) { > > - riscv_load_kernel(machine->kernel_filename, NULL); > > + riscv_load_kernel(machine->kernel_filename, > > + memmap[SIFIVE_E_DEV_DTIM].base, NULL); > > } > > } > > > > diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c > > index 5f3ad9bc0f..08b0a3937d 100644 > > --- a/hw/riscv/sifive_u.c > > +++ b/hw/riscv/sifive_u.c > > @@ -415,6 +415,7 @@ static void sifive_u_machine_init(MachineState *machine) > > MemoryRegion *main_mem = g_new(MemoryRegion, 1); > > MemoryRegion *flash0 = g_new(MemoryRegion, 1); > > target_ulong start_addr = memmap[SIFIVE_U_DEV_DRAM].base; > > + target_ulong firmware_end_addr, kernel_start_addr; > > uint32_t start_addr_hi32 = 0x00000000; > > int i; > > uint32_t fdt_load_addr; > > @@ -474,10 +475,18 @@ static void sifive_u_machine_init(MachineState *machine) > > break; > > } > > > > - riscv_find_and_load_firmware(machine, BIOS_FILENAME, start_addr, NULL); > > + firmware_end_addr = riscv_find_and_load_firmware(machine, BIOS_FILENAME, > > + start_addr, NULL); > > > > if (machine->kernel_filename) { > > - kernel_entry = riscv_load_kernel(machine->kernel_filename, NULL); > > + if (riscv_is_32_bit(machine)) { > > + kernel_start_addr = QEMU_ALIGN_UP(firmware_end_addr, 0x400000); > > Use 4 * MiB > > > + } else { > > + kernel_start_addr = QEMU_ALIGN_UP(firmware_end_addr, 0x200000); > > 2 * MiB > > > + } > > + > > + kernel_entry = riscv_load_kernel(machine->kernel_filename, > > + kernel_start_addr, NULL); > > > > if (machine->initrd_filename) { > > hwaddr start; > > diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c > > index 3fd152a035..280fb1f328 100644 > > --- a/hw/riscv/spike.c > > +++ b/hw/riscv/spike.c > > @@ -195,6 +195,7 @@ static void spike_board_init(MachineState *machine) > > MemoryRegion *system_memory = get_system_memory(); > > MemoryRegion *main_mem = g_new(MemoryRegion, 1); > > MemoryRegion *mask_rom = g_new(MemoryRegion, 1); > > + target_ulong firmware_end_addr, kernel_start_addr; > > uint32_t fdt_load_addr; > > uint64_t kernel_entry; > > char *soc_name; > > @@ -261,12 +262,19 @@ static void spike_board_init(MachineState *machine) > > memory_region_add_subregion(system_memory, memmap[SPIKE_MROM].base, > > mask_rom); > > > > - riscv_find_and_load_firmware(machine, BIOS_FILENAME, > > - memmap[SPIKE_DRAM].base, > > - htif_symbol_callback); > > + firmware_end_addr = riscv_find_and_load_firmware(machine, BIOS_FILENAME, > > + memmap[SPIKE_DRAM].base, > > + htif_symbol_callback); > > > > if (machine->kernel_filename) { > > + if (riscv_is_32_bit(machine)) { > > + kernel_start_addr = QEMU_ALIGN_UP(firmware_end_addr, 0x400000); > > Ditto > > It looks like this same code logic is added in several machine codes, > perhaps a new helper function in riscv/boot.c is needed to determine > the kernel start address based on the firmware end address. Done! Alistair > > > + } else { > > + kernel_start_addr = QEMU_ALIGN_UP(firmware_end_addr, 0x200000); > > + } > > + > > kernel_entry = riscv_load_kernel(machine->kernel_filename, > > + kernel_start_addr, > > htif_symbol_callback); > > > > if (machine->initrd_filename) { > > diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c > > index 41bd2f38ba..bf22d28eef 100644 > > --- a/hw/riscv/virt.c > > +++ b/hw/riscv/virt.c > > @@ -493,6 +493,7 @@ static void virt_machine_init(MachineState *machine) > > char *plic_hart_config, *soc_name; > > size_t plic_hart_config_len; > > target_ulong start_addr = memmap[VIRT_DRAM].base; > > + target_ulong firmware_end_addr, kernel_start_addr; > > uint32_t fdt_load_addr; > > uint64_t kernel_entry; > > DeviceState *mmio_plic, *virtio_plic, *pcie_plic; > > @@ -602,11 +603,18 @@ static void virt_machine_init(MachineState *machine) > > memory_region_add_subregion(system_memory, memmap[VIRT_MROM].base, > > mask_rom); > > > > - riscv_find_and_load_firmware(machine, BIOS_FILENAME, > > - memmap[VIRT_DRAM].base, NULL); > > + firmware_end_addr = riscv_find_and_load_firmware(machine, BIOS_FILENAME, > > + start_addr, NULL); > > > > if (machine->kernel_filename) { > > - kernel_entry = riscv_load_kernel(machine->kernel_filename, NULL); > > + if (riscv_is_32_bit(machine)) { > > + kernel_start_addr = QEMU_ALIGN_UP(firmware_end_addr, 0x400000); > > + } else { > > + kernel_start_addr = QEMU_ALIGN_UP(firmware_end_addr, 0x200000); > > + } > > + > > + kernel_entry = riscv_load_kernel(machine->kernel_filename, > > + kernel_start_addr, NULL); > > > > if (machine->initrd_filename) { > > hwaddr start; > > Regards, > Bin
diff --git a/include/hw/riscv/boot.h b/include/hw/riscv/boot.h index 2975ed1a31..85d3227ea6 100644 --- a/include/hw/riscv/boot.h +++ b/include/hw/riscv/boot.h @@ -34,6 +34,7 @@ target_ulong riscv_load_firmware(const char *firmware_filename, hwaddr firmware_load_addr, symbol_fn_t sym_cb); target_ulong riscv_load_kernel(const char *kernel_filename, + target_ulong firmware_end_addr, symbol_fn_t sym_cb); hwaddr riscv_load_initrd(const char *filename, uint64_t mem_size, uint64_t kernel_entry, hwaddr *start); diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c index 5dea644f47..f8e55ca16a 100644 --- a/hw/riscv/boot.c +++ b/hw/riscv/boot.c @@ -33,10 +33,8 @@ #include <libfdt.h> #if defined(TARGET_RISCV32) -# define KERNEL_BOOT_ADDRESS 0x80400000 #define fw_dynamic_info_data(__val) cpu_to_le32(__val) #else -# define KERNEL_BOOT_ADDRESS 0x80200000 #define fw_dynamic_info_data(__val) cpu_to_le64(__val) #endif @@ -123,7 +121,9 @@ target_ulong riscv_load_firmware(const char *firmware_filename, exit(1); } -target_ulong riscv_load_kernel(const char *kernel_filename, symbol_fn_t sym_cb) +target_ulong riscv_load_kernel(const char *kernel_filename, + target_ulong kernel_start_addr, + symbol_fn_t sym_cb) { uint64_t kernel_entry; @@ -138,9 +138,9 @@ target_ulong riscv_load_kernel(const char *kernel_filename, symbol_fn_t sym_cb) return kernel_entry; } - if (load_image_targphys_as(kernel_filename, KERNEL_BOOT_ADDRESS, + if (load_image_targphys_as(kernel_filename, kernel_start_addr, ram_size, NULL) > 0) { - return KERNEL_BOOT_ADDRESS; + return kernel_start_addr; } error_report("could not load kernel '%s'", kernel_filename); diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c index 0531bd879b..cc758b78b8 100644 --- a/hw/riscv/opentitan.c +++ b/hw/riscv/opentitan.c @@ -75,7 +75,8 @@ static void opentitan_board_init(MachineState *machine) } if (machine->kernel_filename) { - riscv_load_kernel(machine->kernel_filename, NULL); + riscv_load_kernel(machine->kernel_filename, + memmap[IBEX_DEV_RAM].base, NULL); } } diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c index fcfac16816..59bac4cc9a 100644 --- a/hw/riscv/sifive_e.c +++ b/hw/riscv/sifive_e.c @@ -114,7 +114,8 @@ static void sifive_e_machine_init(MachineState *machine) memmap[SIFIVE_E_DEV_MROM].base, &address_space_memory); if (machine->kernel_filename) { - riscv_load_kernel(machine->kernel_filename, NULL); + riscv_load_kernel(machine->kernel_filename, + memmap[SIFIVE_E_DEV_DTIM].base, NULL); } } diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 5f3ad9bc0f..08b0a3937d 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -415,6 +415,7 @@ static void sifive_u_machine_init(MachineState *machine) MemoryRegion *main_mem = g_new(MemoryRegion, 1); MemoryRegion *flash0 = g_new(MemoryRegion, 1); target_ulong start_addr = memmap[SIFIVE_U_DEV_DRAM].base; + target_ulong firmware_end_addr, kernel_start_addr; uint32_t start_addr_hi32 = 0x00000000; int i; uint32_t fdt_load_addr; @@ -474,10 +475,18 @@ static void sifive_u_machine_init(MachineState *machine) break; } - riscv_find_and_load_firmware(machine, BIOS_FILENAME, start_addr, NULL); + firmware_end_addr = riscv_find_and_load_firmware(machine, BIOS_FILENAME, + start_addr, NULL); if (machine->kernel_filename) { - kernel_entry = riscv_load_kernel(machine->kernel_filename, NULL); + if (riscv_is_32_bit(machine)) { + kernel_start_addr = QEMU_ALIGN_UP(firmware_end_addr, 0x400000); + } else { + kernel_start_addr = QEMU_ALIGN_UP(firmware_end_addr, 0x200000); + } + + kernel_entry = riscv_load_kernel(machine->kernel_filename, + kernel_start_addr, NULL); if (machine->initrd_filename) { hwaddr start; diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c index 3fd152a035..280fb1f328 100644 --- a/hw/riscv/spike.c +++ b/hw/riscv/spike.c @@ -195,6 +195,7 @@ static void spike_board_init(MachineState *machine) MemoryRegion *system_memory = get_system_memory(); MemoryRegion *main_mem = g_new(MemoryRegion, 1); MemoryRegion *mask_rom = g_new(MemoryRegion, 1); + target_ulong firmware_end_addr, kernel_start_addr; uint32_t fdt_load_addr; uint64_t kernel_entry; char *soc_name; @@ -261,12 +262,19 @@ static void spike_board_init(MachineState *machine) memory_region_add_subregion(system_memory, memmap[SPIKE_MROM].base, mask_rom); - riscv_find_and_load_firmware(machine, BIOS_FILENAME, - memmap[SPIKE_DRAM].base, - htif_symbol_callback); + firmware_end_addr = riscv_find_and_load_firmware(machine, BIOS_FILENAME, + memmap[SPIKE_DRAM].base, + htif_symbol_callback); if (machine->kernel_filename) { + if (riscv_is_32_bit(machine)) { + kernel_start_addr = QEMU_ALIGN_UP(firmware_end_addr, 0x400000); + } else { + kernel_start_addr = QEMU_ALIGN_UP(firmware_end_addr, 0x200000); + } + kernel_entry = riscv_load_kernel(machine->kernel_filename, + kernel_start_addr, htif_symbol_callback); if (machine->initrd_filename) { diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 41bd2f38ba..bf22d28eef 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -493,6 +493,7 @@ static void virt_machine_init(MachineState *machine) char *plic_hart_config, *soc_name; size_t plic_hart_config_len; target_ulong start_addr = memmap[VIRT_DRAM].base; + target_ulong firmware_end_addr, kernel_start_addr; uint32_t fdt_load_addr; uint64_t kernel_entry; DeviceState *mmio_plic, *virtio_plic, *pcie_plic; @@ -602,11 +603,18 @@ static void virt_machine_init(MachineState *machine) memory_region_add_subregion(system_memory, memmap[VIRT_MROM].base, mask_rom); - riscv_find_and_load_firmware(machine, BIOS_FILENAME, - memmap[VIRT_DRAM].base, NULL); + firmware_end_addr = riscv_find_and_load_firmware(machine, BIOS_FILENAME, + start_addr, NULL); if (machine->kernel_filename) { - kernel_entry = riscv_load_kernel(machine->kernel_filename, NULL); + if (riscv_is_32_bit(machine)) { + kernel_start_addr = QEMU_ALIGN_UP(firmware_end_addr, 0x400000); + } else { + kernel_start_addr = QEMU_ALIGN_UP(firmware_end_addr, 0x200000); + } + + kernel_entry = riscv_load_kernel(machine->kernel_filename, + kernel_start_addr, NULL); if (machine->initrd_filename) { hwaddr start;
Signed-off-by: Alistair Francis <alistair.francis@wdc.com> --- include/hw/riscv/boot.h | 1 + hw/riscv/boot.c | 10 +++++----- hw/riscv/opentitan.c | 3 ++- hw/riscv/sifive_e.c | 3 ++- hw/riscv/sifive_u.c | 13 +++++++++++-- hw/riscv/spike.c | 14 +++++++++++--- hw/riscv/virt.c | 14 +++++++++++--- 7 files changed, 43 insertions(+), 15 deletions(-)