| Message ID | 20201013172223.443645-1-georg.kotheimer@kernkonzept.com |
|---|---|
| State | Accepted |
| Commit | 1da46012eaaeb2feb3aa6a5a8fc0a03200b673aa |
| Headers | show |
| Series | target/riscv: Fix implementation of HLVX.WU instruction | expand |
On 10/13/20 7:22 PM, Georg Kotheimer wrote: > The HLVX.WU instruction is supposed to read a machine word, > but prior to this change it read a byte instead. > Fixes: 8c5362acb57 ("target/riscv: Allow generating hlv/hlvx/hsv instructions") Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> > Signed-off-by: Georg Kotheimer <georg.kotheimer@kernkonzept.com> > --- > target/riscv/op_helper.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/target/riscv/op_helper.c b/target/riscv/op_helper.c > index 9b9ada45a9..3b7bd6ee88 100644 > --- a/target/riscv/op_helper.c > +++ b/target/riscv/op_helper.c > @@ -334,12 +334,12 @@ target_ulong helper_hyp_x_load(CPURISCVState *env, target_ulong address, > riscv_cpu_set_two_stage_lookup(env, true); > > switch (memop) { > - case MO_TEUL: > - pte = cpu_ldub_data_ra(env, address, GETPC()); > - break; > case MO_TEUW: > pte = cpu_lduw_data_ra(env, address, GETPC()); > break; > + case MO_TEUL: > + pte = cpu_ldl_data_ra(env, address, GETPC()); > + break; > default: > g_assert_not_reached(); > } >
On Tue, Oct 13, 2020 at 10:23 AM Georg Kotheimer <georg.kotheimer@kernkonzept.com> wrote: > > The HLVX.WU instruction is supposed to read a machine word, > but prior to this change it read a byte instead. > > Signed-off-by: Georg Kotheimer <georg.kotheimer@kernkonzept.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Thanks! Applied to riscv-to-apply.next Alistair > --- > target/riscv/op_helper.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/target/riscv/op_helper.c b/target/riscv/op_helper.c > index 9b9ada45a9..3b7bd6ee88 100644 > --- a/target/riscv/op_helper.c > +++ b/target/riscv/op_helper.c > @@ -334,12 +334,12 @@ target_ulong helper_hyp_x_load(CPURISCVState *env, target_ulong address, > riscv_cpu_set_two_stage_lookup(env, true); > > switch (memop) { > - case MO_TEUL: > - pte = cpu_ldub_data_ra(env, address, GETPC()); > - break; > case MO_TEUW: > pte = cpu_lduw_data_ra(env, address, GETPC()); > break; > + case MO_TEUL: > + pte = cpu_ldl_data_ra(env, address, GETPC()); > + break; > default: > g_assert_not_reached(); > } > -- > 2.25.1 > >
diff --git a/target/riscv/op_helper.c b/target/riscv/op_helper.c index 9b9ada45a9..3b7bd6ee88 100644 --- a/target/riscv/op_helper.c +++ b/target/riscv/op_helper.c @@ -334,12 +334,12 @@ target_ulong helper_hyp_x_load(CPURISCVState *env, target_ulong address, riscv_cpu_set_two_stage_lookup(env, true); switch (memop) { - case MO_TEUL: - pte = cpu_ldub_data_ra(env, address, GETPC()); - break; case MO_TEUW: pte = cpu_lduw_data_ra(env, address, GETPC()); break; + case MO_TEUL: + pte = cpu_ldl_data_ra(env, address, GETPC()); + break; default: g_assert_not_reached(); }
The HLVX.WU instruction is supposed to read a machine word, but prior to this change it read a byte instead. Signed-off-by: Georg Kotheimer <georg.kotheimer@kernkonzept.com> --- target/riscv/op_helper.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)