@@ -1210,6 +1210,7 @@ is_devlink_port_supported(const struct mlx5_core_dev *dev,
static int register_devlink_port(struct mlx5_core_dev *dev,
struct mlx5e_rep_priv *rpriv)
{
+ struct mlx5_esw_offload *offloads = &dev->priv.eswitch->offloads;
struct devlink *devlink = priv_to_devlink(dev);
struct mlx5_eswitch_rep *rep = rpriv->rep;
struct devlink_port_attrs attrs = {};
@@ -1232,10 +1233,14 @@ static int register_devlink_port(struct mlx5_core_dev *dev,
} else if (rep->vport == MLX5_VPORT_PF) {
memcpy(rpriv->dl_port.attrs.switch_id.id, &ppid.id[0], ppid.id_len);
rpriv->dl_port.attrs.switch_id.id_len = ppid.id_len;
+ if (mlx5_core_is_ecpf_esw_manager(dev))
+ devlink_port_attrs_controller_set(&rpriv->dl_port, offloads->host_number);
devlink_port_attrs_pci_pf_set(&rpriv->dl_port, pfnum);
} else if (mlx5_eswitch_is_vf_vport(dev->priv.eswitch, rpriv->rep->vport)) {
memcpy(rpriv->dl_port.attrs.switch_id.id, &ppid.id[0], ppid.id_len);
rpriv->dl_port.attrs.switch_id.id_len = ppid.id_len;
+ if (mlx5_core_is_ecpf_esw_manager(dev))
+ devlink_port_attrs_controller_set(&rpriv->dl_port, offloads->host_number);
devlink_port_attrs_pci_vf_set(&rpriv->dl_port,
pfnum, rep->vport - 1);
}
@@ -217,6 +217,7 @@ struct mlx5_esw_offload {
atomic64_t num_flows;
enum devlink_eswitch_encap_mode encap;
struct ida vport_metadata_ida;
+ unsigned int host_number; /* ECPF supports one external host */
};
/* E-Switch MC FDB table hash node */
@@ -2110,6 +2110,23 @@ int mlx5_esw_funcs_changed_handler(struct notifier_block *nb, unsigned long type
return NOTIFY_OK;
}
+static int mlx5_esw_host_number_init(struct mlx5_eswitch *esw)
+{
+ const u32 *query_host_out;
+
+ if (!mlx5_core_is_ecpf_esw_manager(esw->dev))
+ return 0;
+
+ query_host_out = mlx5_esw_query_functions(esw->dev);
+ if (IS_ERR(query_host_out))
+ return PTR_ERR(query_host_out);
+
+ esw->offloads.host_number = MLX5_GET(query_esw_functions_out, query_host_out,
+ host_params_context.host_number);
+ kvfree(query_host_out);
+ return 0;
+}
+
int esw_offloads_enable(struct mlx5_eswitch *esw)
{
struct mlx5_vport *vport;
@@ -2124,6 +2141,10 @@ int esw_offloads_enable(struct mlx5_eswitch *esw)
mutex_init(&esw->offloads.termtbl_mutex);
mlx5_rdma_enable_roce(esw->dev);
+ err = mlx5_esw_host_number_init(esw);
+ if (err)
+ goto err_vport_metadata;
+
err = esw_set_passing_vport_metadata(esw, true);
if (err)
goto err_vport_metadata;
ECPF supports one external host controller. When a port belongs to an external host controller, setup external controller port attribute. An example of a VF port of a ECPF supporting for an external controller: $ devlink port show pci/0000:00:08.0/2 pci/0000:00:08.0/2: type eth netdev eth7 controller 0 flavour pcivf pfnum 0 vfnum 1 splittable false function: hw_addr 00:00:00:00:00:00 $ devlink port show -jp pci/0000:00:08.0/2 { "port": { "pci/0000:00:08.0/2": { "type": "eth", "netdev": "eth7", "controller": 0, "flavour": "pcivf", "pfnum": 0, "vfnum": 1, "splittable": false, "function": { "hw_addr": "00:00:00:00:00:00" } } } } An example representor netdev udev name consist of controller annotation for external controller with controller number = 0, for PF 0 and VF 1: $ udevadm test-builtin net_id /sys/class/net/eth7 Using default interface naming scheme 'v245'. ID_NET_NAMING_SCHEME=v245 ID_NET_NAME_PATH=enp0s8f0nc0pf0vf1 Unload module index Unloaded link configuration context. Signed-off-by: Parav Pandit <parav@mellanox.com> Reviewed-by: Jiri Pirko <jiri@nvidia.com> Reviewed-by: Roi Dayan <roid@mellanox.com> --- .../net/ethernet/mellanox/mlx5/core/en_rep.c | 5 +++++ .../net/ethernet/mellanox/mlx5/core/eswitch.h | 1 + .../mellanox/mlx5/core/eswitch_offloads.c | 21 +++++++++++++++++++ 3 files changed, 27 insertions(+)