| Message ID | 1600306748-3176-1-git-send-email-willy.liu@realtek.com |
|---|---|
| State | New |
| Headers | show |
| Series | net: phy: realtek: Replace 2.5Gbps name from RTL8125 to RTL8226 | expand |
On Thu, Sep 17, 2020 at 09:39:08AM +0800, Willy Liu wrote: > According to PHY ID, 0x001cc800 should be named "RTL8226 2.5Gbps PHY" > and 0x001cc840 should be named "RTL8226B_RTL8221B 2.5Gbps PHY". > RTL8125 is not a single PHY solution, it integrates PHY/MAC/PCIE bus > controller and embedded memory. > > Signed-off-by: Willy Liu <willy.liu@realtek.com> Hi Willy Before submitting any more patches, please take a look at: https://www.kernel.org/doc/html/latest/networking/netdev-FAQ.html Reviewed-by: Andrew Lunn <andrew@lunn.ch> Andrew
Hi Andrew, Thanks for your information. Should I do any modifications to make this patch be applied? B.R. Willy -----Original Message----- From: Andrew Lunn <andrew@lunn.ch> Sent: Thursday, September 17, 2020 9:40 PM To: 劉偉權 <willy.liu@realtek.com> Cc: hkallweit1@gmail.com; davem@davemloft.net; linux@armlinux.org.uk; kuba@kernel.org; Ryan Kao <ryankao@realtek.com>; netdev@vger.kernel.org; linux-kernel@vger.kernel.org Subject: Re: [PATCH] net: phy: realtek: Replace 2.5Gbps name from RTL8125 to RTL8226 On Thu, Sep 17, 2020 at 09:39:08AM +0800, Willy Liu wrote: > According to PHY ID, 0x001cc800 should be named "RTL8226 2.5Gbps PHY" > and 0x001cc840 should be named "RTL8226B_RTL8221B 2.5Gbps PHY". > RTL8125 is not a single PHY solution, it integrates PHY/MAC/PCIE bus > controller and embedded memory. > > Signed-off-by: Willy Liu <willy.liu@realtek.com> Hi Willy Before submitting any more patches, please take a look at: https://www.kernel.org/doc/html/latest/networking/netdev-FAQ.html Reviewed-by: Andrew Lunn <andrew@lunn.ch> Andrew ------Please consider the environment before printing this e-mail.
On Fri, Sep 18, 2020 at 09:02:43AM +0000, 劉偉權 wrote: > Hi Andrew, > Thanks for your information. Should I do any modifications to make this patch be applied? Please do not to post. And wrap your text to about 75 characters. Since i think you are new to posting to netdev, we tend to be generous to start with, and allow minor process errors. But we do expect you to learn from what we say, and watch other patches on netdev, so that future patches do follow the processes. So please get [PATCH <tree> v<version>] correct in your next patches, include a summary of what has changed between versions, etc. I guess David will accept this patch. If not, he will tell you why and what you need to improve. Andrew
Hi Andrew, Thanks...understood... B.R. Willy ----Original Message----- From: Andrew Lunn <andrew@lunn.ch> Sent: Friday, September 18, 2020 10:01 PM To: 劉偉權 <willy.liu@realtek.com> Cc: hkallweit1@gmail.com; davem@davemloft.net; linux@armlinux.org.uk; kuba@kernel.org; Ryan Kao <ryankao@realtek.com>; netdev@vger.kernel.org; linux-kernel@vger.kernel.org Subject: Re: [PATCH] net: phy: realtek: Replace 2.5Gbps name from RTL8125 to RTL8226 On Fri, Sep 18, 2020 at 09:02:43AM +0000, 劉偉權 wrote: > Hi Andrew, > Thanks for your information. Should I do any modifications to make this patch be applied? Please do not to post. And wrap your text to about 75 characters. Since i think you are new to posting to netdev, we tend to be generous to start with, and allow minor process errors. But we do expect you to learn from what we say, and watch other patches on netdev, so that future patches do follow the processes. So please get [PATCH <tree> v<version>] correct in your next patches, include a summary of what has changed between versions, etc. I guess David will accept this patch. If not, he will tell you why and what you need to improve. Andrew ------Please consider the environment before printing this e-mail.
From: 劉偉權 <willy.liu@realtek.com> Date: Mon, 21 Sep 2020 01:55:23 +0000 > Hi Andrew, > Thanks...understood... This is a top-post. Andrew said to not top-post, and you said you understand this. If you understand it, please stop top-posting. Thank you.
diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c old mode 100644 new mode 100755 index 95dbe5e..a98b09d --- a/drivers/net/phy/realtek.c +++ b/drivers/net/phy/realtek.c @@ -400,7 +400,7 @@ static int rtlgen_write_mmd(struct phy_device *phydev, int devnum, u16 regnum, return ret; } -static int rtl8125_read_mmd(struct phy_device *phydev, int devnum, u16 regnum) +static int rtl822x_read_mmd(struct phy_device *phydev, int devnum, u16 regnum) { int ret = rtlgen_read_mmd(phydev, devnum, regnum); @@ -424,7 +424,7 @@ static int rtl8125_read_mmd(struct phy_device *phydev, int devnum, u16 regnum) return ret; } -static int rtl8125_write_mmd(struct phy_device *phydev, int devnum, u16 regnum, +static int rtl822x_write_mmd(struct phy_device *phydev, int devnum, u16 regnum, u16 val) { int ret = rtlgen_write_mmd(phydev, devnum, regnum, val); @@ -441,7 +441,7 @@ static int rtl8125_write_mmd(struct phy_device *phydev, int devnum, u16 regnum, return ret; } -static int rtl8125_get_features(struct phy_device *phydev) +static int rtl822x_get_features(struct phy_device *phydev) { int val; @@ -459,7 +459,7 @@ static int rtl8125_get_features(struct phy_device *phydev) return genphy_read_abilities(phydev); } -static int rtl8125_config_aneg(struct phy_device *phydev) +static int rtl822x_config_aneg(struct phy_device *phydev) { int ret = 0; @@ -479,7 +479,7 @@ static int rtl8125_config_aneg(struct phy_device *phydev) return __genphy_config_aneg(phydev, ret); } -static int rtl8125_read_status(struct phy_device *phydev) +static int rtl822x_read_status(struct phy_device *phydev) { int ret; @@ -521,7 +521,7 @@ static int rtlgen_match_phy_device(struct phy_device *phydev) !rtlgen_supports_2_5gbps(phydev); } -static int rtl8125_match_phy_device(struct phy_device *phydev) +static int rtl8226_match_phy_device(struct phy_device *phydev) { return phydev->phy_id == RTL_GENERIC_PHYID && rtlgen_supports_2_5gbps(phydev); @@ -626,29 +626,29 @@ static int rtlgen_resume(struct phy_device *phydev) .read_mmd = rtlgen_read_mmd, .write_mmd = rtlgen_write_mmd, }, { - .name = "RTL8125 2.5Gbps internal", - .match_phy_device = rtl8125_match_phy_device, - .get_features = rtl8125_get_features, - .config_aneg = rtl8125_config_aneg, - .read_status = rtl8125_read_status, + .name = "RTL8226 2.5Gbps PHY", + .match_phy_device = rtl8226_match_phy_device, + .get_features = rtl822x_get_features, + .config_aneg = rtl822x_config_aneg, + .read_status = rtl822x_read_status, .suspend = genphy_suspend, .resume = rtlgen_resume, .read_page = rtl821x_read_page, .write_page = rtl821x_write_page, - .read_mmd = rtl8125_read_mmd, - .write_mmd = rtl8125_write_mmd, + .read_mmd = rtl822x_read_mmd, + .write_mmd = rtl822x_write_mmd, }, { PHY_ID_MATCH_EXACT(0x001cc840), - .name = "RTL8125B 2.5Gbps internal", - .get_features = rtl8125_get_features, - .config_aneg = rtl8125_config_aneg, - .read_status = rtl8125_read_status, + .name = "RTL8226B_RTL8221B 2.5Gbps PHY", + .get_features = rtl822x_get_features, + .config_aneg = rtl822x_config_aneg, + .read_status = rtl822x_read_status, .suspend = genphy_suspend, .resume = rtlgen_resume, .read_page = rtl821x_read_page, .write_page = rtl821x_write_page, - .read_mmd = rtl8125_read_mmd, - .write_mmd = rtl8125_write_mmd, + .read_mmd = rtl822x_read_mmd, + .write_mmd = rtl822x_write_mmd, }, { PHY_ID_MATCH_EXACT(0x001cc961), .name = "RTL8366RB Gigabit Ethernet",
According to PHY ID, 0x001cc800 should be named "RTL8226 2.5Gbps PHY" and 0x001cc840 should be named "RTL8226B_RTL8221B 2.5Gbps PHY". RTL8125 is not a single PHY solution, it integrates PHY/MAC/PCIE bus controller and embedded memory. Signed-off-by: Willy Liu <willy.liu@realtek.com> --- drivers/net/phy/realtek.c | 38 +++++++++++++++++++------------------- 1 file changed, 19 insertions(+), 19 deletions(-) mode change 100644 => 100755 drivers/net/phy/realtek.c