Message ID | 20201001152148.29747-8-l.stelmach@samsung.com |
---|---|
State | Superseded |
Headers | show |
Series | [v2,RESEND,1/9] spi: spi-s3c64xx: swap s3c64xx_spi_set_cs() and s3c64xx_enable_datapath() | expand |
On Thu, Oct 01, 2020 at 05:21:46PM +0200, Łukasz Stelmach wrote: > Make sure the cur_speed value used in s3c64xx_enable_datapath() > to configure DMA channel and in s3c64xx_wait_for_*() to calculate the > transfer timeout is set to the actual value of (half) the clock speed. > > Suggested-by: Tomasz Figa <tomasz.figa@gmail.com> > Signed-off-by: Łukasz Stelmach <l.stelmach@samsung.com> > --- > drivers/spi/spi-s3c64xx.c | 1 + > 1 file changed, 1 insertion(+) > Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Best regards, Krzysztof
diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c index 02de734b8ab1..89c162efe355 100644 --- a/drivers/spi/spi-s3c64xx.c +++ b/drivers/spi/spi-s3c64xx.c @@ -626,6 +626,7 @@ static int s3c64xx_spi_config(struct s3c64xx_spi_driver_data *sdd) ret = clk_set_rate(sdd->src_clk, sdd->cur_speed * 2); if (ret) return ret; + sdd->cur_speed = clk_get_rate(sdd->src_clk) / 2; } else { /* Configure Clock */ val = readl(regs + S3C64XX_SPI_CLK_CFG);
Make sure the cur_speed value used in s3c64xx_enable_datapath() to configure DMA channel and in s3c64xx_wait_for_*() to calculate the transfer timeout is set to the actual value of (half) the clock speed. Suggested-by: Tomasz Figa <tomasz.figa@gmail.com> Signed-off-by: Łukasz Stelmach <l.stelmach@samsung.com> --- drivers/spi/spi-s3c64xx.c | 1 + 1 file changed, 1 insertion(+)