@@ -2073,6 +2073,55 @@ sbsa_uart_set_termios(struct uart_port *port, struct ktermios *termios,
spin_unlock_irqrestore(&port->lock, flags);
}
+static void
+xlnx_sbsa_uart_set_termios(struct uart_port *port, struct ktermios *termios,
+ struct ktermios *old)
+{
+ struct uart_amba_port *uap =
+ container_of(port, struct uart_amba_port, port);
+ unsigned long flags;
+ unsigned int lcr_h, old_cr;
+
+ tty_termios_encode_baud_rate(termios, uap->fixed_baud, uap->fixed_baud);
+ /* The SBSA UART only supports 8n1 without hardware flow control. */
+ termios->c_cflag &= ~(CMSPAR | CRTSCTS);
+ switch (termios->c_cflag & CSIZE) {
+ case CS5:
+ lcr_h = UART01x_LCRH_WLEN_5;
+ break;
+ case CS6:
+ lcr_h = UART01x_LCRH_WLEN_6;
+ break;
+ case CS7:
+ lcr_h = UART01x_LCRH_WLEN_7;
+ break;
+ default:
+ lcr_h = UART01x_LCRH_WLEN_8;
+ break;
+ }
+ if (termios->c_cflag & CSTOPB)
+ lcr_h |= UART01x_LCRH_STP2;
+ if (termios->c_cflag & PARENB) {
+ lcr_h |= UART01x_LCRH_PEN;
+ if (!(termios->c_cflag & PARODD))
+ lcr_h |= UART01x_LCRH_EPS;
+ if (termios->c_cflag & CMSPAR)
+ lcr_h |= UART011_LCRH_SPS;
+ }
+ if (uap->fifosize > 1)
+ lcr_h |= UART01x_LCRH_FEN;
+
+ spin_lock_irqsave(&port->lock, flags);
+ uart_update_timeout(port, CS8, uap->fixed_baud);
+ pl011_setup_status_masks(port, termios);
+ /* first, disable everything */
+ old_cr = pl011_read(uap, REG_CR);
+ pl011_write(0, uap, REG_CR);
+ pl011_write_lcr_h(uap, lcr_h);
+ pl011_write(old_cr, uap, REG_CR);
+ spin_unlock_irqrestore(&port->lock, flags);
+}
+
static const char *pl011_type(struct uart_port *port)
{
struct uart_amba_port *uap =
@@ -2179,6 +2228,28 @@ static const struct uart_ops sbsa_uart_pops = {
#endif
};
+static const struct uart_ops xlnx_sbsa_uart_pops = {
+ .tx_empty = pl011_tx_empty,
+ .set_mctrl = sbsa_uart_set_mctrl,
+ .get_mctrl = sbsa_uart_get_mctrl,
+ .stop_tx = pl011_stop_tx,
+ .start_tx = pl011_start_tx,
+ .stop_rx = pl011_stop_rx,
+ .startup = sbsa_uart_startup,
+ .shutdown = sbsa_uart_shutdown,
+ .set_termios = xlnx_sbsa_uart_set_termios,
+ .type = pl011_type,
+ .release_port = pl011_release_port,
+ .request_port = pl011_request_port,
+ .config_port = pl011_config_port,
+ .verify_port = pl011_verify_port,
+#ifdef CONFIG_CONSOLE_POLL
+ .poll_init = pl011_hwinit,
+ .poll_get_char = pl011_get_poll_char,
+ .poll_put_char = pl011_put_poll_char,
+#endif
+};
+
static struct uart_amba_port *amba_ports[UART_NR];
#ifdef CONFIG_SERIAL_AMBA_PL011_CONSOLE
@@ -2754,7 +2825,10 @@ static int sbsa_uart_probe(struct platform_device *pdev)
uap->reg_offset = uap->vendor->reg_offset;
uap->fifosize = 32;
uap->port.iotype = uap->vendor->access_32b ? UPIO_MEM32 : UPIO_MEM;
- uap->port.ops = &sbsa_uart_pops;
+ if (of_device_is_compatible(pdev->dev.of_node, "arm,xlnx-sbsa-uart"))
+ uap->port.ops = &xlnx_sbsa_uart_pops;
+ else
+ uap->port.ops = &sbsa_uart_pops;
uap->fixed_baud = baudrate;
snprintf(uap->type, sizeof(uap->type), "SBSA");
@@ -2781,6 +2855,7 @@ static int sbsa_uart_remove(struct platform_device *pdev)
static const struct of_device_id sbsa_uart_of_match[] = {
{ .compatible = "arm,sbsa-uart", },
+ { .compatible = "arm,xlnx-sbsa-uart", },
{},
};
MODULE_DEVICE_TABLE(of, sbsa_uart_of_match);
Xilinx uart is similar to sbsa but it has configurable parity and hardware flow. Add a compatible for the same. Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> --- drivers/tty/serial/amba-pl011.c | 77 ++++++++++++++++++++++++++++++++++++++++- 1 file changed, 76 insertions(+), 1 deletion(-)