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[2/2] arm: highbank: setup custom MPIDR value

Message ID 1393280086-19431-2-git-send-email-robherring2@gmail.com
State New
Headers show

Commit Message

Rob Herring Feb. 24, 2014, 10:14 p.m. UTC 
From: Rob Herring <rob.herring@linaro.org>

Calxeda highbank platform uses a cluster id of 9 which makes MPIDR
register be 0x8000090n where n is the core number. This causes problems
on current kernels expecting the MPIDR to match DT cpu reg property.

Midway is "normal" and has a cluster id of 0, so it does not need this
override.

Signed-off-by: Rob Herring <rob.herring@linaro.org>
---
 hw/arm/highbank.c | 9 +++++++++
 1 file changed, 9 insertions(+)
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Patch

diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c
index d76a1d1..e73d86f 100644
--- a/hw/arm/highbank.c
+++ b/hw/arm/highbank.c
@@ -241,6 +241,15 @@  static void calxeda_init(QEMUMachineInitArgs *args, enum cxmachines machine)
             error_report("%s", error_get_pretty(err));
             exit(1);
         }
+
+        if (machine == CALXEDA_HIGHBANK) {
+            object_property_set_int(OBJECT(cpu), 0x80000900 | n, "mpidr",
+                                    &err);
+            if (err) {
+                error_report("%s", error_get_pretty(err));
+                exit(1);
+            }
+        }
         object_property_set_bool(OBJECT(cpu), true, "realized", &err);
         if (err) {
             error_report("%s", error_get_pretty(err));