| Message ID | 19e06f26c1e4b0bf48d3971e2f1fb1af27da159a.1601222348.git.saiprakash.ranjan@codeaurora.org |
|---|---|
| State | Accepted |
| Commit | 3477326277451000bc667dfcc4fd0774c039184c |
| Headers | show |
| Series | Coresight ETF NULL pointer dereference and ETM save/restore fixes | expand |
Hi Sai, On 09/27/2020 05:20 PM, Sai Prakash Ranjan wrote: > In commit f188b5e76aae ("coresight: etm4x: Save/restore state > across CPU low power states"), mistakenly TRCVMIDCCTLR1 register > value was saved in trcvmidcctlr0 state variable which is used to > store TRCVMIDCCTLR0 register value in etm4x_cpu_save() and then > same value is written back to both TRCVMIDCCTLR0 and TRCVMIDCCTLR1 > in etm4x_cpu_restore(). There is already a trcvmidcctlr1 state > variable available for TRCVMIDCCTLR1, so use it. > > Fixes: 8b44fdfef6a2 ("coresight: etm4x: Allow etm4x to be built as a module") Why is this commit in question ? > Fixes: f188b5e76aae ("coresight: etm4x: Save/restore state across CPU low power states") I believe this is the right fixes tag. > Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> > --- > drivers/hwtracing/coresight/coresight-etm4x-core.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c > index de76d57850bc..abd706b216ac 100644 > --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c > +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c > @@ -1243,7 +1243,7 @@ static int etm4_cpu_save(struct etmv4_drvdata *drvdata) > state->trccidcctlr1 = readl(drvdata->base + TRCCIDCCTLR1); > > state->trcvmidcctlr0 = readl(drvdata->base + TRCVMIDCCTLR0); > - state->trcvmidcctlr0 = readl(drvdata->base + TRCVMIDCCTLR1); > + state->trcvmidcctlr1 = readl(drvdata->base + TRCVMIDCCTLR1); > > state->trcclaimset = readl(drvdata->base + TRCCLAIMCLR); > > @@ -1353,7 +1353,7 @@ static void etm4_cpu_restore(struct etmv4_drvdata *drvdata) > writel_relaxed(state->trccidcctlr1, drvdata->base + TRCCIDCCTLR1); > > writel_relaxed(state->trcvmidcctlr0, drvdata->base + TRCVMIDCCTLR0); > - writel_relaxed(state->trcvmidcctlr0, drvdata->base + TRCVMIDCCTLR1); > + writel_relaxed(state->trcvmidcctlr1, drvdata->base + TRCVMIDCCTLR1); > Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Hi Suzuki, On 2020-09-28 16:35, Suzuki K Poulose wrote: > Hi Sai, > > On 09/27/2020 05:20 PM, Sai Prakash Ranjan wrote: >> In commit f188b5e76aae ("coresight: etm4x: Save/restore state >> across CPU low power states"), mistakenly TRCVMIDCCTLR1 register >> value was saved in trcvmidcctlr0 state variable which is used to >> store TRCVMIDCCTLR0 register value in etm4x_cpu_save() and then >> same value is written back to both TRCVMIDCCTLR0 and TRCVMIDCCTLR1 >> in etm4x_cpu_restore(). There is already a trcvmidcctlr1 state >> variable available for TRCVMIDCCTLR1, so use it. >> >> Fixes: 8b44fdfef6a2 ("coresight: etm4x: Allow etm4x to be built as a >> module") > > Why is this commit in question ? My bad sorry, I thought there are two commits which touch this hunk of code, but I see now that the module code just renamed the file, so this fixes tag is not required. > >> Fixes: f188b5e76aae ("coresight: etm4x: Save/restore state across CPU >> low power states") > > I believe this is the right fixes tag. > Yes, I will resend with only this fixes tag. >> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> >> --- >> drivers/hwtracing/coresight/coresight-etm4x-core.c | 4 ++-- >> 1 file changed, 2 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c >> b/drivers/hwtracing/coresight/coresight-etm4x-core.c >> index de76d57850bc..abd706b216ac 100644 >> --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c >> +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c >> @@ -1243,7 +1243,7 @@ static int etm4_cpu_save(struct etmv4_drvdata >> *drvdata) >> state->trccidcctlr1 = readl(drvdata->base + TRCCIDCCTLR1); >> state->trcvmidcctlr0 = readl(drvdata->base + TRCVMIDCCTLR0); >> - state->trcvmidcctlr0 = readl(drvdata->base + TRCVMIDCCTLR1); >> + state->trcvmidcctlr1 = readl(drvdata->base + TRCVMIDCCTLR1); >> state->trcclaimset = readl(drvdata->base + TRCCLAIMCLR); >> @@ -1353,7 +1353,7 @@ static void etm4_cpu_restore(struct >> etmv4_drvdata *drvdata) >> writel_relaxed(state->trccidcctlr1, drvdata->base + TRCCIDCCTLR1); >> writel_relaxed(state->trcvmidcctlr0, drvdata->base + >> TRCVMIDCCTLR0); >> - writel_relaxed(state->trcvmidcctlr0, drvdata->base + TRCVMIDCCTLR1); >> + writel_relaxed(state->trcvmidcctlr1, drvdata->base + TRCVMIDCCTLR1); >> > > Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Thanks, Sai
diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c index de76d57850bc..abd706b216ac 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c @@ -1243,7 +1243,7 @@ static int etm4_cpu_save(struct etmv4_drvdata *drvdata) state->trccidcctlr1 = readl(drvdata->base + TRCCIDCCTLR1); state->trcvmidcctlr0 = readl(drvdata->base + TRCVMIDCCTLR0); - state->trcvmidcctlr0 = readl(drvdata->base + TRCVMIDCCTLR1); + state->trcvmidcctlr1 = readl(drvdata->base + TRCVMIDCCTLR1); state->trcclaimset = readl(drvdata->base + TRCCLAIMCLR); @@ -1353,7 +1353,7 @@ static void etm4_cpu_restore(struct etmv4_drvdata *drvdata) writel_relaxed(state->trccidcctlr1, drvdata->base + TRCCIDCCTLR1); writel_relaxed(state->trcvmidcctlr0, drvdata->base + TRCVMIDCCTLR0); - writel_relaxed(state->trcvmidcctlr0, drvdata->base + TRCVMIDCCTLR1); + writel_relaxed(state->trcvmidcctlr1, drvdata->base + TRCVMIDCCTLR1); writel_relaxed(state->trcclaimset, drvdata->base + TRCCLAIMSET);
In commit f188b5e76aae ("coresight: etm4x: Save/restore state across CPU low power states"), mistakenly TRCVMIDCCTLR1 register value was saved in trcvmidcctlr0 state variable which is used to store TRCVMIDCCTLR0 register value in etm4x_cpu_save() and then same value is written back to both TRCVMIDCCTLR0 and TRCVMIDCCTLR1 in etm4x_cpu_restore(). There is already a trcvmidcctlr1 state variable available for TRCVMIDCCTLR1, so use it. Fixes: 8b44fdfef6a2 ("coresight: etm4x: Allow etm4x to be built as a module") Fixes: f188b5e76aae ("coresight: etm4x: Save/restore state across CPU low power states") Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> --- drivers/hwtracing/coresight/coresight-etm4x-core.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)