diff mbox series

[v2,27/76] target/microblaze: Check singlestep_enabled in gen_goto_tb

Message ID 20200828141929.77854-28-richard.henderson@linaro.org
State New
Headers show
Series target/microblaze improvements | expand

Commit Message

Richard Henderson Aug. 28, 2020, 2:18 p.m. UTC
Do not use goto_tb if we're single-stepping.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 target/microblaze/translate.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

-- 
2.25.1

Comments

Edgar E. Iglesias Aug. 31, 2020, 1:54 p.m. UTC | #1
On Fri, Aug 28, 2020 at 07:18:40AM -0700, Richard Henderson wrote:
> Do not use goto_tb if we're single-stepping.

> 

> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

> ---

>  target/microblaze/translate.c | 7 ++++++-

>  1 file changed, 6 insertions(+), 1 deletion(-)

> 

> diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c

> index 53ca0bfb38..7d5b96c38b 100644

> --- a/target/microblaze/translate.c

> +++ b/target/microblaze/translate.c

> @@ -140,7 +140,12 @@ static inline bool use_goto_tb(DisasContext *dc, target_ulong dest)

>  

>  static void gen_goto_tb(DisasContext *dc, int n, target_ulong dest)

>  {

> -    if (use_goto_tb(dc, dest)) {

> +    if (dc->singlestep_enabled) {

> +        TCGv_i32 tmp = tcg_const_i32(EXCP_DEBUG);

> +        tcg_gen_movi_i64(cpu_SR[SR_PC], dest);


This needs to be i32 cpu_pc to avoid breaking bisection. Looks like this
part slipped over to the next patch.

With that fixed:
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>




> +        gen_helper_raise_exception(cpu_env, tmp);

> +        tcg_temp_free_i32(tmp);

> +    } else if (use_goto_tb(dc, dest)) {

>          tcg_gen_goto_tb(n);

>          tcg_gen_movi_i32(cpu_pc, dest);

>          tcg_gen_exit_tb(dc->tb, n);

> -- 

> 2.25.1

>
Richard Henderson Aug. 31, 2020, 2:55 p.m. UTC | #2
On 8/31/20 6:54 AM, Edgar E. Iglesias wrote:
>> +        TCGv_i32 tmp = tcg_const_i32(EXCP_DEBUG);

>> +        tcg_gen_movi_i64(cpu_SR[SR_PC], dest);

> 

> This needs to be i32 cpu_pc to avoid breaking bisection. Looks like this

> part slipped over to the next patch.

> 

> With that fixed:

> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>


Whoops, yes.  Thanks.


r~
diff mbox series

Patch

diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
index 53ca0bfb38..7d5b96c38b 100644
--- a/target/microblaze/translate.c
+++ b/target/microblaze/translate.c
@@ -140,7 +140,12 @@  static inline bool use_goto_tb(DisasContext *dc, target_ulong dest)
 
 static void gen_goto_tb(DisasContext *dc, int n, target_ulong dest)
 {
-    if (use_goto_tb(dc, dest)) {
+    if (dc->singlestep_enabled) {
+        TCGv_i32 tmp = tcg_const_i32(EXCP_DEBUG);
+        tcg_gen_movi_i64(cpu_SR[SR_PC], dest);
+        gen_helper_raise_exception(cpu_env, tmp);
+        tcg_temp_free_i32(tmp);
+    } else if (use_goto_tb(dc, dest)) {
         tcg_gen_goto_tb(n);
         tcg_gen_movi_i32(cpu_pc, dest);
         tcg_gen_exit_tb(dc->tb, n);