| Message ID | 1392471397-2158-3-git-send-email-marc.zyngier@arm.com |
|---|---|
| State | Superseded |
| Headers | show
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[85.214.87.163]) by mx.google.com with ESMTP id v48si18584524eeo.188.2014.02.15.06.13.13 for <multiple recipients>; Sat, 15 Feb 2014 06:13:14 -0800 (PST) Received-SPF: pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 7E3074B7BE; Sat, 15 Feb 2014 15:12:54 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id NtQdscMxck-T; Sat, 15 Feb 2014 15:12:54 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 56A764B792; Sat, 15 Feb 2014 15:11:55 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 7455C4B76D for <u-boot@lists.denx.de>; Sat, 15 Feb 2014 15:11:44 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id PSK9XzoO4V56 for <u-boot@lists.denx.de>; Sat, 15 Feb 2014 15:11:43 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from inca-roads.misterjones.org (inca-roads.misterjones.org [213.251.177.50]) by theia.denx.de (Postfix) with ESMTPS id 8B98A4B714 for <u-boot@lists.denx.de>; Sat, 15 Feb 2014 15:11:22 +0100 (CET) Received: from [176.250.132.24] (helo=why.wild-wind.fr.eu.org) by cheepnis.misterjones.org with esmtpsa (TLS1.2:RSA_AES_128_CBC_SHA256:128) (Exim 4.80) (envelope-from <marc.zyngier@arm.com>) id 1WEfQH-00038M-VT; Sat, 15 Feb 2014 14:36:50 +0100 From: Marc Zyngier <marc.zyngier@arm.com> To: u-boot@lists.denx.de, linux-sunxi@googlegroups.com Date: Sat, 15 Feb 2014 13:36:26 +0000 Message-Id: <1392471397-2158-3-git-send-email-marc.zyngier@arm.com> X-Mailer: git-send-email 1.8.5.1 In-Reply-To: <1392471397-2158-1-git-send-email-marc.zyngier@arm.com> References: <1392471397-2158-1-git-send-email-marc.zyngier@arm.com> X-SA-Exim-Connect-IP: 176.250.132.24 X-SA-Exim-Rcpt-To: u-boot@lists.denx.de, linux-sunxi@googlegroups.com, maxime.ripard@free-electrons.com, ijc@hellion.org.uk, andre@andrep.de, henrik@henriknordstrom.net, maz@misterjones.org X-SA-Exim-Mail-From: marc.zyngier@arm.com X-SA-Exim-Scanned: No (on cheepnis.misterjones.org); SAEximRunCond expanded to false Cc: Andre Przywara <andre@andrep.de>, maz@misterjones.org, Ian Campbell <ijc@hellion.org.uk> Subject: [U-Boot] [PATCH v3 02/13] ARM: HYP/non-sec: add a barrier after setting SCR.NS==1 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: <patchwork-forward.linaro.org> List-Unsubscribe: <http://groups.google.com/a/linaro.org/group/patchwork-forward/subscribe>, <mailto:googlegroups-manage+836684582541+unsubscribe@googlegroups.com> List-Archive: <http://groups.google.com/a/linaro.org/group/patchwork-forward/> List-Post: <http://groups.google.com/a/linaro.org/group/patchwork-forward/post>, <mailto:patchwork-forward@linaro.org> List-Help: <http://support.google.com/a/linaro.org/bin/topic.py?topic=25838>, <mailto:patchwork-forward+help@linaro.org> List-Subscribe: <http://lists.denx.de/mailman/listinfo/u-boot>, <mailto:u-boot-request@lists.denx.de?subject=subscribe> MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de X-Removed-Original-Auth: Dkim didn't pass. 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diff --git a/arch/arm/cpu/armv7/nonsec_virt.S b/arch/arm/cpu/armv7/nonsec_virt.S index 6367e09..12de5c2 100644 --- a/arch/arm/cpu/armv7/nonsec_virt.S +++ b/arch/arm/cpu/armv7/nonsec_virt.S @@ -46,6 +46,7 @@ _secure_monitor: #endif mcr p15, 0, r1, c1, c1, 0 @ write SCR (with NS bit set) + isb #ifdef CONFIG_ARMV7_VIRT mrceq p15, 0, r0, c12, c0, 1 @ get MVBAR value
A CP15 instruction execution can be reordered, requiring an isb to be sure it is executed in program order. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> --- arch/arm/cpu/armv7/nonsec_virt.S | 1 + 1 file changed, 1 insertion(+)