| Message ID | 20200518114837.25020-2-ioana.ciornei@nxp.com |
|---|---|
| State | Accepted |
| Commit | 8cbef912ee8e73fccf2543428e73ecd25d386dba |
| Headers | show |
| Series | boards: ls2080aqds: transition to CONFIG_DM_ETH | expand |
>-----Original Message----- >From: U-Boot <u-boot-bounces at lists.denx.de> On Behalf Of Ioana Ciornei >Sent: Monday, May 18, 2020 5:19 PM >To: Priyanka Jain <priyanka.jain at nxp.com>; u-boot at lists.denx.de >Cc: Ioana Ciornei <ioana.ciornei at nxp.com> >Subject: [PATCH v3 1/3] board: ls2080aqds: transition to DM_ETH > >In case CONFIG_DM_ETH is enabled, no hardcoding is necessary for DPAA2 >Ethernet devices. Compile out any unnecessary setup when CONFIG_DM_ETH >is activated. Also, force the PCI devices to be enumerated at probe time. > >Signed-off-by: Ioana Ciornei <ioana.ciornei at nxp.com> >--- Series applied to u-boot-fsl-qoriq. Awaiting upstream. Thanks Priyanka
diff --git a/board/freescale/ls2080aqds/eth.c b/board/freescale/ls2080aqds/eth.c index bbb70a859a1e..2b1b106b0732 100644 --- a/board/freescale/ls2080aqds/eth.c +++ b/board/freescale/ls2080aqds/eth.c @@ -24,6 +24,8 @@ #define MC_BOOT_ENV_VAR "mcinitcmd" +#ifndef CONFIG_DM_ETH + #if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD) /* - In LS2080A there are only 16 SERDES lanes, spread across 2 SERDES banks. * Bank 1 -> Lanes A, B, C, D, E, F, G, H @@ -889,10 +891,11 @@ void ls2080a_handle_phy_interface_xsgmii(int i) } } #endif +#endif // !CONFIG_DM_ETH int board_eth_init(bd_t *bis) { - int error; +#ifndef CONFIG_DM_ETH #if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD) struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_FSL_GUTS_ADDR; int serdes1_prtcl = (in_le32(&gur->rcwsr[28]) & @@ -906,6 +909,7 @@ int board_eth_init(bd_t *bis) struct memac_mdio_info *memac_mdio1_info; unsigned int i; char *env_hwconfig; + int error; env_hwconfig = env_get("hwconfig"); @@ -970,8 +974,13 @@ int board_eth_init(bd_t *bis) sgmii_configure_repeater(2); } #endif - error = pci_eth_init(bis); - return error; +#endif // !CONFIG_DM_ETH + +#ifdef CONFIG_DM_ETH + return 0; +#else + return pci_eth_init(bis); +#endif } #if defined(CONFIG_RESET_PHY_R) diff --git a/board/freescale/ls2080aqds/ls2080aqds.c b/board/freescale/ls2080aqds/ls2080aqds.c index 4034bdee2842..1c91c5b7f052 100644 --- a/board/freescale/ls2080aqds/ls2080aqds.c +++ b/board/freescale/ls2080aqds/ls2080aqds.c @@ -251,6 +251,10 @@ int board_init(void) ppa_init(); #endif +#if !defined(CONFIG_SYS_EARLY_PCI_INIT) && defined(CONFIG_DM_ETH) + pci_init(); +#endif + return 0; }
In case CONFIG_DM_ETH is enabled, no hardcoding is necessary for DPAA2 Ethernet devices. Compile out any unnecessary setup when CONFIG_DM_ETH is activated. Also, force the PCI devices to be enumerated at probe time. Signed-off-by: Ioana Ciornei <ioana.ciornei at nxp.com> --- Changes in v3: - fixed a build warning board/freescale/ls2080aqds/eth.c | 15 ++++++++++++--- board/freescale/ls2080aqds/ls2080aqds.c | 4 ++++ 2 files changed, 16 insertions(+), 3 deletions(-)