@@ -55,4 +55,10 @@
#define CMU_DEVCLKEN1_ETH BIT(23)
+#define GPIO_MFP_PWM (0xE01B0000)
+#define MFP_CTL0 (GPIO_MFP_PWM + 0x40)
+#define MFP_CTL1 (GPIO_MFP_PWM + 0x44)
+#define MFP_CTL2 (GPIO_MFP_PWM + 0x48)
+#define MFP_CTL3 (GPIO_MFP_PWM + 0x4C)
+
#endif
@@ -225,6 +225,13 @@ config ETH_DESIGNWARE_SOCFPGA
Altera system manager to correctly interface with the PHY.
This code handles those SoC specifics.
+config ETH_DESIGNWARE_S700
+ bool "Actins S700 glue driver for Synopsys Designware Ethernet MAC"
+ depends on DM_ETH && ETH_DESIGNWARE
+ help
+ This provides glue layer to use Synopsys Designware Ethernet MAC
+ present on Actions S700 SoC.
+
config ETHOC
bool "OpenCores 10/100 Mbps Ethernet MAC"
help
@@ -18,6 +18,7 @@ obj-$(CONFIG_CS8900) += cs8900.o
obj-$(CONFIG_TULIP) += dc2114x.o
obj-$(CONFIG_ETH_DESIGNWARE) += designware.o
obj-$(CONFIG_ETH_DESIGNWARE_SOCFPGA) += dwmac_socfpga.o
+obj-$(CONFIG_ETH_DESIGNWARE_S700) += dwmac_s700.o
obj-$(CONFIG_DRIVER_DM9000) += dm9000x.o
obj-$(CONFIG_DNET) += dnet.o
obj-$(CONFIG_E1000) += e1000.o
new file mode 100644
@@ -0,0 +1,66 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2020 Amit Singh Tomar <amittomer25 at gmail.com>
+ *
+ * Actions DWMAC specific glue layer
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <dm.h>
+#include <clk.h>
+#include <phy.h>
+#include <regmap.h>
+#include <reset.h>
+#include <syscon.h>
+#include "designware.h"
+#include <asm/arch-owl/regs_s700.h>
+
+/* pin control for MAC */
+#define RMII_TXD01_MFP_CTL0 (0x0 << 16)
+#define RMII_RXD01_MFP_CTL0 (0x0 << 8)
+#define RMII_TXEN_TXER_MFP_CTL0 (0x0 << 13)
+#define RMII_REF_CLK_MFP_CTL0 (0x0 << 6)
+#define CLKO_25M_EN_MFP_CTL3 BIT(30)
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static void dwmac_board_setup(void)
+{
+ clrbits_le32(MFP_CTL0, (RMII_TXD01_MFP_CTL0 | RMII_RXD01_MFP_CTL0 |
+ RMII_TXEN_TXER_MFP_CTL0 | RMII_REF_CLK_MFP_CTL0));
+
+ setbits_le32(MFP_CTL3, CLKO_25M_EN_MFP_CTL3);
+}
+
+static int dwmac_s700_probe(struct udevice *dev)
+{
+ dwmac_board_setup();
+
+ /* This is undocumented, phy interface select register */
+ writel(0x4, 0xe024c0a0);
+
+ return designware_eth_probe(dev);
+}
+
+static int dwmac_s700_ofdata_to_platdata(struct udevice *dev)
+{
+ return designware_eth_ofdata_to_platdata(dev);
+}
+
+static const struct udevice_id dwmac_s700_ids[] = {
+ {.compatible = "actions,s700-ethernet"},
+ { }
+};
+
+U_BOOT_DRIVER(dwmac_s700) = {
+ .name = "dwmac_s700",
+ .id = UCLASS_ETH,
+ .of_match = dwmac_s700_ids,
+ .ofdata_to_platdata = dwmac_s700_ofdata_to_platdata,
+ .probe = dwmac_s700_probe,
+ .ops = &designware_eth_ops,
+ .priv_auto_alloc_size = sizeof(struct dw_eth_dev),
+ .platdata_auto_alloc_size = sizeof(struct eth_pdata),
+ .flags = DM_FLAG_ALLOC_PRIV_DMA,
+};
This patchs adds glue logic to enable designware mac present on Action Semi based S700 SoC, Configures SoC specific bits. Undocumented bit that programs the PHY interface select register comes from vendor source. It has been tested on Cubieboard7-lite based on S700 SoC. Signed-off-by: Amit Singh Tomar <amittomer25 at gmail.com> --- arch/arm/include/asm/arch-owl/regs_s700.h | 6 +++ drivers/net/Kconfig | 7 ++++ drivers/net/Makefile | 1 + drivers/net/dwmac_s700.c | 66 +++++++++++++++++++++++++++++++ 4 files changed, 80 insertions(+) create mode 100644 drivers/net/dwmac_s700.c