Message ID | 20200506221159.1298-2-michael@walle.cc |
---|---|
State | New |
Headers | show |
Series | phy: atheros: dt bindings and cleanup | expand |
On Thu, May 07, 2020 at 12:11:48AM +0200, Michael Walle wrote: > From: Vladimir Oltean <vladimir.oltean at nxp.com> > > Delete the extraneous write to debug reg 5 that enables Tx delay > > When the driver was originally introduced in commit "6027384a phylib: > Add Atheros AR8035 GETH PHY support", the Tx delay was being > unconditionally enabled. > > Then during "2ec4d10b phy: atheros: add support for RGMII_ID, RGMII_TXID > and RGMII_RXID", the author did not notice that code for enabling Tx > delay code was already. Therefore, the if condition for Tx delay has > always been useless for this PHY since this commit introduced it. > > Prior to this patch, every AR8035 PHY in U-boot had Tx delay enabled. > After this patch, only those who define the interface as RGMII_TXID or > RGMII_ID will. This is to be expected, but will nonetheless break the > setups of those who didn't know they rely on Tx delay implicitly. > > Signed-off-by: Vladimir Oltean <vladimir.oltean at nxp.com> > Acked-by: Joe Hershberger <joe.hershberger at ni.com> Applied to u-boot/master, thanks!
diff --git a/drivers/net/phy/atheros.c b/drivers/net/phy/atheros.c index 3783d155e7..537c1a9125 100644 --- a/drivers/net/phy/atheros.c +++ b/drivers/net/phy/atheros.c @@ -63,10 +63,6 @@ static int ar8035_config(struct phy_device *phydev) regval = phy_read(phydev, MDIO_DEVAD_NONE, 0xe); phy_write(phydev, MDIO_DEVAD_NONE, 0xe, (regval|0x0018)); - phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); - regval = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e); - phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, (regval|0x0100)); - if ((phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) || (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)) { /* select debug reg 5 */