[12/13] dts: powerpc: p2020rdb: Add eTSEC DT nodes

Message ID	20200505113814.39047-13-Zhiqiang.Hou@nxp.com
State	New
Headers	show List-Id: U-Boot discussion <u-boot.lists.denx.de> From: Zhiqiang.Hou at nxp.com (Zhiqiang Hou) Date: Tue, 5 May 2020 19:38:13 +0800 Subject: [PATCH 12/13] dts: powerpc: p2020rdb: Add eTSEC DT nodes In-Reply-To: <20200505113814.39047-1-Zhiqiang.Hou@nxp.com> References: <20200505113814.39047-1-Zhiqiang.Hou@nxp.com> Message-ID: <20200505113814.39047-13-Zhiqiang.Hou@nxp.com>
Series	powerpc: covert p1010, p1020 and p2020 RDB board \| expand [00/13] powerpc: covert p1010, p1020 and p2020 RDB board [01/13] net: fsl_pq_mdio: Add the compatible "fsl, gianfar-mdio" support [02/13] net: tsec: Add the compatible string "gianfar" support [03/13] powerpc: mpc8xxx: Don't compile cpu_eth_init() when DM_ETH enabled [04/13] fsl: p1_p2_rdb: Move vsc7835 firmware uploading to board_early_init_r() [05/13] configs: p1_p2_rdb: Add the default address of vsc7385 firmware [06/13] dts: powerpc: p1020rdb: Add eTSEC DT nodes [07/13] powerpc: p1_p2_rdb: Don't compile board_eth_init() when DM_ETH enabled [08/13] configs: P1020RDB: Enable DM_ETH config [09/13] dts: powerpc: p1010rdb: Add eTSEC DT nodes [10/13] powerpc: p1010rdb: Compile legacy ethernet init function when no DM_ETH [11/13] configs: P1010RDB: Enable DM_ETH config [12/13] dts: powerpc: p2020rdb: Add eTSEC DT nodes [13/13] configs: P2020RDB: Enable DM_ETH config

diff --git a/arch/powerpc/dts/p2020-post.dtsi b/arch/powerpc/dts/p2020-post.dtsi index 5bbd5c5468..5cdc1655d9 100644 --- a/arch/powerpc/dts/p2020-post.dtsi +++ b/arch/powerpc/dts/p2020-post.dtsi @@ -37,6 +37,16 @@ /* Filled in by U-Boot */ clock-frequency = <0>; }; + +/include/ "pq3-etsec1-0.dtsi" +/include/ "pq3-etsec1-timer-0.dtsi" + + ptp_clock at 24e00 { + interrupts = <68 2 0 0 69 2 0 0 70 2 0 0>; + }; + +/include/ "pq3-etsec1-1.dtsi" +/include/ "pq3-etsec1-2.dtsi" }; /* PCIe controller base address 0x8000 */ diff --git a/arch/powerpc/dts/p2020rdb-pc.dts b/arch/powerpc/dts/p2020rdb-pc.dts index 08befd4c59..f3f6be1080 100644 --- a/arch/powerpc/dts/p2020rdb-pc.dts +++ b/arch/powerpc/dts/p2020rdb-pc.dts @@ -37,4 +37,5 @@ }; }; +/include/ "p2020rdb-pc.dtsi" /include/ "p2020-post.dtsi" diff --git a/arch/powerpc/dts/p2020rdb-pc.dtsi b/arch/powerpc/dts/p2020rdb-pc.dtsi new file mode 100644 index 0000000000..9abd700999 --- /dev/null +++ b/arch/powerpc/dts/p2020rdb-pc.dtsi @@ -0,0 +1,59 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * P2020 RDB-PC Device Tree Source stub (no addresses or top-level ranges) + * + * Copyright 2011 Freescale Semiconductor Inc. + * Copyright 2020 NXP + */ + +&soc { + mdio at 24520 { + phy0: ethernet-phy at 0 { + interrupts = <3 1 0 0>; + reg = <0x0>; + }; + phy1: ethernet-phy at 1 { + interrupts = <2 1 0 0>; + reg = <0x1>; + }; + }; + + mdio at 25520 { + tbi0: tbi-phy at 11 { + reg = <0x11>; + device_type = "tbi-phy"; + }; + }; + + mdio at 26520 { + status = "disabled"; + }; + + ptp_clock at 24e00 { + fsl,tclk-period = <5>; + fsl,tmr-prsc = <2>; + fsl,tmr-add = <0xaaaaaaab>; + fsl,tmr-fiper1 = <999999995>; + fsl,tmr-fiper2 = <99990>; + fsl,max-adj = <299999999>; + }; + + enet0: ethernet at 24000 { + phy-connection-type = "rgmii-id"; + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + enet1: ethernet at 25000 { + tbi-handle = <&tbi0>; + phy-handle = <&phy0>; + phy-connection-type = "sgmii"; + }; + + enet2: ethernet at 26000 { + phy-handle = <&phy1>; + phy-connection-type = "rgmii-id"; + }; +}; diff --git a/arch/powerpc/dts/p2020rdb-pc_36b.dts b/arch/powerpc/dts/p2020rdb-pc_36b.dts index 04b2519e1a..6d983b7d71 100644 --- a/arch/powerpc/dts/p2020rdb-pc_36b.dts +++ b/arch/powerpc/dts/p2020rdb-pc_36b.dts @@ -37,4 +37,5 @@ }; }; +/include/ "p2020rdb-pc.dtsi" /include/ "p2020-post.dtsi" diff --git a/arch/powerpc/dts/pq3-etsec1-0.dtsi b/arch/powerpc/dts/pq3-etsec1-0.dtsi new file mode 100644 index 0000000000..8800243f34 --- /dev/null +++ b/arch/powerpc/dts/pq3-etsec1-0.dtsi @@ -0,0 +1,28 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * PQ3 eTSEC device tree stub [ @ offsets 0x24000 ] + * + * Copyright 2011-2012 Freescale Semiconductor Inc. + * Copyright 2020 NXP + */ + +ethernet at 24000 { + #address-cells = <1>; + #size-cells = <1>; + cell-index = <0>; + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <0x24000 0x1000>; + ranges = <0x0 0x24000 0x1000>; + fsl,magic-packet; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <29 2 0 0 30 2 0 0 34 2 0 0>; +}; + +mdio at 24520 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,gianfar-mdio"; + reg = <0x24520 0x20>; +}; diff --git a/arch/powerpc/dts/pq3-etsec1-1.dtsi b/arch/powerpc/dts/pq3-etsec1-1.dtsi new file mode 100644 index 0000000000..2bc62d1a57 --- /dev/null +++ b/arch/powerpc/dts/pq3-etsec1-1.dtsi @@ -0,0 +1,28 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * PQ3 eTSEC device tree stub [ @ offsets 0x25000 ] + * + * Copyright 2011-2012 Freescale Semiconductor Inc. + * Copyright 2020 NXP + */ + +ethernet at 25000 { + #address-cells = <1>; + #size-cells = <1>; + cell-index = <1>; + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <0x25000 0x1000>; + ranges = <0x0 0x25000 0x1000>; + fsl,magic-packet; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <35 2 0 0 36 2 0 0 40 2 0 0>; +}; + +mdio at 25520 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,gianfar-tbi"; + reg = <0x25520 0x20>; +}; diff --git a/arch/powerpc/dts/pq3-etsec1-2.dtsi b/arch/powerpc/dts/pq3-etsec1-2.dtsi new file mode 100644 index 0000000000..d45865fe03 --- /dev/null +++ b/arch/powerpc/dts/pq3-etsec1-2.dtsi @@ -0,0 +1,28 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * PQ3 eTSEC device tree stub [ @ offsets 0x26000 ] + * + * Copyright 2011-2012 Freescale Semiconductor Inc. + * Copyright 2020 NXP + */ + +ethernet at 26000 { + #address-cells = <1>; + #size-cells = <1>; + cell-index = <2>; + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <0x26000 0x1000>; + ranges = <0x0 0x26000 0x1000>; + fsl,magic-packet; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <31 2 0 0 32 2 0 0 33 2 0 0>; +}; + +mdio at 26520 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,gianfar-tbi"; + reg = <0x26520 0x20>; +}; diff --git a/arch/powerpc/dts/pq3-etsec1-3.dtsi b/arch/powerpc/dts/pq3-etsec1-3.dtsi new file mode 100644 index 0000000000..853a27359d --- /dev/null +++ b/arch/powerpc/dts/pq3-etsec1-3.dtsi @@ -0,0 +1,28 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * PQ3 eTSEC device tree stub [ @ offsets 0x27000 ] + * + * Copyright 2011-2012 Freescale Semiconductor Inc. + * Copyright 2020 NXP + */ + +ethernet at 27000 { + #address-cells = <1>; + #size-cells = <1>; + cell-index = <3>; + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <0x27000 0x1000>; + ranges = <0x0 0x27000 0x1000>; + fsl,magic-packet; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <37 2 0 0 38 2 0 0 39 2 0 0>; +}; + +mdio at 27520 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,gianfar-tbi"; + reg = <0x27520 0x20>; +}; diff --git a/arch/powerpc/dts/pq3-etsec1-timer-0.dtsi b/arch/powerpc/dts/pq3-etsec1-timer-0.dtsi new file mode 100644 index 0000000000..19b37aca1d --- /dev/null +++ b/arch/powerpc/dts/pq3-etsec1-timer-0.dtsi @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * PQ3 eTSEC Timer (IEEE 1588) device tree stub [ @ offsets 0x24e00 ] + * + * Copyright 2011 Freescale Semiconductor Inc. + * Copyright 2020 NXP + */ + +ptp_clock at 24e00 { + compatible = "fsl,etsec-ptp"; + reg = <0x24e00 0xb0>; + interrupts = <68 2 0 0 69 2 0 0>; +};

[12/13] dts: powerpc: p2020rdb: Add eTSEC DT nodes

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