Message ID | 20200323014526.3340884-3-marex@denx.de |
---|---|
State | Accepted |
Commit | dd90c2e1ea0a7abdfa501e604523c23d6f77ffdd |
Headers | show |
Series | [1/6] net: dwc_eth_qos: Fully rewrite RX descriptor field 3 | expand |
On Mon, Mar 23, 2020 at 3:45 AM Marek Vasut <marex at denx.de> wrote: > > Currently the code only flushes the first RX descriptor, not every entry > in the RX descriptor ring. Fix this, to make sure the DMA engine can pick > the RX descriptors correctly. > > Signed-off-by: Marek Vasut <marex at denx.de> > Cc: Joe Hershberger <joe.hershberger at ni.com> > Cc: Patrice Chotard <patrice.chotard at st.com> > Cc: Patrick Delaunay <patrick.delaunay at st.com> > Cc: Ramon Fried <rfried.dev at gmail.com> > Cc: Stephen Warren <swarren at nvidia.com> > --- > drivers/net/dwc_eth_qos.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c > index c4f665bda9..66cc301c8c 100644 > --- a/drivers/net/dwc_eth_qos.c > +++ b/drivers/net/dwc_eth_qos.c > @@ -1243,8 +1243,8 @@ static int eqos_start(struct udevice *dev) > rx_desc->des0 = (u32)(ulong)(eqos->rx_dma_buf + > (i * EQOS_MAX_PACKET_SIZE)); > rx_desc->des3 = EQOS_DESC3_OWN | EQOS_DESC3_BUF1V; > + eqos->config->ops->eqos_flush_desc(rx_desc); > } > - eqos->config->ops->eqos_flush_desc(eqos->descs); > > writel(0, &eqos->dma_regs->ch0_txdesc_list_haddress); > writel((ulong)eqos->tx_descs, &eqos->dma_regs->ch0_txdesc_list_address); > -- > 2.25.1 > Reviewed-by: Ramon Fried <rfried.dev at gmail.com>
diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c index c4f665bda9..66cc301c8c 100644 --- a/drivers/net/dwc_eth_qos.c +++ b/drivers/net/dwc_eth_qos.c @@ -1243,8 +1243,8 @@ static int eqos_start(struct udevice *dev) rx_desc->des0 = (u32)(ulong)(eqos->rx_dma_buf + (i * EQOS_MAX_PACKET_SIZE)); rx_desc->des3 = EQOS_DESC3_OWN | EQOS_DESC3_BUF1V; + eqos->config->ops->eqos_flush_desc(rx_desc); } - eqos->config->ops->eqos_flush_desc(eqos->descs); writel(0, &eqos->dma_regs->ch0_txdesc_list_haddress); writel((ulong)eqos->tx_descs, &eqos->dma_regs->ch0_txdesc_list_address);
Currently the code only flushes the first RX descriptor, not every entry in the RX descriptor ring. Fix this, to make sure the DMA engine can pick the RX descriptors correctly. Signed-off-by: Marek Vasut <marex at denx.de> Cc: Joe Hershberger <joe.hershberger at ni.com> Cc: Patrice Chotard <patrice.chotard at st.com> Cc: Patrick Delaunay <patrick.delaunay at st.com> Cc: Ramon Fried <rfried.dev at gmail.com> Cc: Stephen Warren <swarren at nvidia.com> --- drivers/net/dwc_eth_qos.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)