@@ -3,6 +3,7 @@
* Copyright 2017-2018 NXP
*/
#include <common.h>
+#include <cpu_func.h>
#include <env.h>
#include <i2c.h>
#include <malloc.h>
@@ -14,6 +15,7 @@
#include <asm/io.h>
#include <fdt_support.h>
#include <linux/libfdt.h>
+#include <linux/sizes.h>
#include <fsl-mc/fsl_mc.h>
#include <env_internal.h>
#include <asm/arch-fsl-layerscape/soc.h>
@@ -22,6 +24,7 @@
#include <asm/arch/fsl_serdes.h>
#include <asm/arch/soc.h>
#include <asm/arch-fsl-layerscape/fsl_icid.h>
+#include <asm/gic-v3.h>
#include "../common/qixis.h"
#include "ls1088a_qixis.h"
@@ -30,6 +33,7 @@
DECLARE_GLOBAL_DATA_PTR;
+#define GIC_LPI_SIZE 0x200000
#ifdef CONFIG_TARGET_LS1088AQDS
#ifdef CONFIG_TFABOOT
struct ifc_regs ifc_cfg_ifc_nor_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = {
@@ -914,6 +918,8 @@ int ft_board_setup(void *blob, bd_t *bd)
u64 mc_memory_base = 0;
u64 mc_memory_size = 0;
u16 total_memory_banks;
+ u64 gic_lpi_base;
+ int ret;
ft_cpu_setup(blob, bd);
@@ -934,6 +940,15 @@ int ft_board_setup(void *blob, bd_t *bd)
}
#ifdef CONFIG_RESV_RAM
+#ifdef CONFIG_GIC_V3_ITS
+ gic_lpi_base = ALIGN(gd->arch.resv_ram - GIC_LPI_SIZE, SZ_64K);
+ ret = fdt_add_resv_mem_gic_rd_tables(blob, gic_lpi_base, GIC_LPI_SIZE);
+ if (!ret) {
+ if (gic_lpi_tables_init(gic_lpi_base, cpu_numcores()))
+ debug("%s: failed to init gic-lpi-tables\n", __func__);
+ }
+#endif
+
/* reduce size if reserved memory is within this bank */
if (gd->arch.resv_ram >= base[0] &&
gd->arch.resv_ram < base[0] + size[0])