diff mbox series

[03/12] arm64: layerscape: Move the GIC tables reserve memory function to soc.c

Message ID 20200319053846.2304-4-Zhiqiang.Hou@nxp.com
State New
Headers show
Series fsl: layerscape: Initialize the GIC redistributor | expand

Commit Message

Zhiqiang Hou March 19, 2020, 5:38 a.m. UTC 
From: Hou Zhiqiang <Zhiqiang.Hou at nxp.com>

Move the function of reserving memory for GIC redistributor tables
to soc.c, such that other Layerscape platform can leverage it, and
add a argument for the memory size to reserve.
And rename the function so that it is more readable.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou at nxp.com>
---
 arch/arm/cpu/armv8/fsl-layerscape/soc.c        | 18 ++++++++++++++++++
 arch/arm/include/asm/arch-fsl-layerscape/soc.h |  4 ++++
 board/freescale/lx2160a/lx2160a.c              | 17 +----------------
 3 files changed, 23 insertions(+), 16 deletions(-)
diff mbox series

Patch

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index d0e10cb007..eef282909c 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -33,6 +33,24 @@ 
 DECLARE_GLOBAL_DATA_PTR;
 #endif
 
+#ifdef CONFIG_GIC_V3_ITS
+int fdt_add_resv_mem_gic_rd_tables(void *blob, u64 base, size_t size)
+{
+	u32 phandle;
+	int err;
+	struct fdt_memory gic_rd_tables;
+
+	gic_rd_tables.start = base;
+	gic_rd_tables.end = base + size - 1;
+	err = fdtdec_add_reserved_memory(blob, "gic-rd-tables", &gic_rd_tables,
+					 &phandle);
+	if (err < 0)
+		debug("%s: failed to add reserved memory: %d\n", __func__, err);
+
+	return err;
+}
+#endif
+
 bool soc_has_dp_ddr(void)
 {
 	struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
index c62d414aac..2081b71cd7 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
@@ -158,6 +158,10 @@  void erratum_a010315(void);
 
 bool soc_has_dp_ddr(void);
 bool soc_has_aiop(void);
+
+#ifdef CONFIG_GIC_V3_ITS
+int fdt_add_resv_mem_gic_rd_tables(void *blob, u64 base, size_t size);
+#endif
 #endif
 
 #endif /* _ASM_ARMV8_FSL_LAYERSCAPE_SOC_H_ */
diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c
index 595c774b42..290d80db90 100644
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@@ -630,21 +630,6 @@  void board_quiesce_devices(void)
 }
 #endif
 
-#ifdef CONFIG_GIC_V3_ITS
-void fdt_fixup_gic_lpi_memory(void *blob, u64 gic_lpi_base)
-{
-	u32 phandle;
-	int err;
-	struct fdt_memory gic_lpi;
-
-	gic_lpi.start = gic_lpi_base;
-	gic_lpi.end = gic_lpi_base + GIC_LPI_SIZE - 1;
-	err = fdtdec_add_reserved_memory(blob, "gic-lpi", &gic_lpi, &phandle);
-	if (err < 0)
-		debug("failed to add reserved memory: %d\n", err);
-}
-#endif
-
 #ifdef CONFIG_OF_BOARD_SETUP
 int ft_board_setup(void *blob, bd_t *bd)
 {
@@ -679,7 +664,7 @@  int ft_board_setup(void *blob, bd_t *bd)
 #ifdef CONFIG_GIC_V3_ITS
 	gic_lpi_base = gd->arch.resv_ram - GIC_LPI_SIZE;
 	gic_lpi_tables_init(gic_lpi_base, cpu_numcores());
-	fdt_fixup_gic_lpi_memory(blob, gic_lpi_base);
+	fdt_add_resv_mem_gic_rd_tables(blob, gic_lpi_base, GIC_LPI_SIZE);
 #endif
 
 #ifdef CONFIG_RESV_RAM