Message ID | 20200622131710.31168-2-al.kochet@gmail.com |
---|---|
State | Accepted |
Commit | 5e15dcb4cbc7906690a759554be082b025d2aa52 |
Headers | show |
Series | v2: rr3188: change APP to 600MHz and enable bwadj for DPLL | expand |
On 2020/6/22 ??9:17, Alexander Kochetkov wrote: > The commit 84a6a27ae3ff ("rockchip: rk3188: init CPU freq in clock > driver") changed ARM clock from 600MHz to 1600MHz. It made boot > unstable due to the fact that PMIC at the start generates insufficient > voltage for operation. See also: commit f4f57c58b589 ("rockchip: > rk3188: Setup the armclk in spl"). > > Fixes commit 84a6a27ae3ff ("rockchip: rk3188: init CPU freq in clock > driver"). > > Signed-off-by: Alexander Kochetkov <al.kochet at gmail.com> Reviewed-by: Kever Yang <kever.yang at rock-chips.com> Thanks, - Kever > --- > drivers/clk/rockchip/clk_rk3188.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/clk/rockchip/clk_rk3188.c b/drivers/clk/rockchip/clk_rk3188.c > index b193ac913e..4fc5c78563 100644 > --- a/drivers/clk/rockchip/clk_rk3188.c > +++ b/drivers/clk/rockchip/clk_rk3188.c > @@ -564,7 +564,8 @@ static int rk3188_clk_probe(struct udevice *dev) > rkclk_init(priv->cru, priv->grf, priv->has_bwadj); > > /* Init CPU frequency */ > - rkclk_configure_cpu(priv->cru, priv->grf, APLL_HZ, priv->has_bwadj); > + rkclk_configure_cpu(priv->cru, priv->grf, APLL_SAFE_HZ, > + priv->has_bwadj); > #endif > > return 0;
diff --git a/drivers/clk/rockchip/clk_rk3188.c b/drivers/clk/rockchip/clk_rk3188.c index b193ac913e..4fc5c78563 100644 --- a/drivers/clk/rockchip/clk_rk3188.c +++ b/drivers/clk/rockchip/clk_rk3188.c @@ -564,7 +564,8 @@ static int rk3188_clk_probe(struct udevice *dev) rkclk_init(priv->cru, priv->grf, priv->has_bwadj); /* Init CPU frequency */ - rkclk_configure_cpu(priv->cru, priv->grf, APLL_HZ, priv->has_bwadj); + rkclk_configure_cpu(priv->cru, priv->grf, APLL_SAFE_HZ, + priv->has_bwadj); #endif return 0;
The commit 84a6a27ae3ff ("rockchip: rk3188: init CPU freq in clock driver") changed ARM clock from 600MHz to 1600MHz. It made boot unstable due to the fact that PMIC at the start generates insufficient voltage for operation. See also: commit f4f57c58b589 ("rockchip: rk3188: Setup the armclk in spl"). Fixes commit 84a6a27ae3ff ("rockchip: rk3188: init CPU freq in clock driver"). Signed-off-by: Alexander Kochetkov <al.kochet at gmail.com> --- drivers/clk/rockchip/clk_rk3188.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)