@@ -25,17 +25,16 @@ static inline const struct clk_ops *clk_dev_ops(struct udevice *dev)
#if CONFIG_IS_ENABLED(OF_CONTROL)
# if CONFIG_IS_ENABLED(OF_PLATDATA)
-int clk_get_by_index_platdata(struct udevice *dev, int index,
- struct phandle_1_arg *cells, struct clk *clk)
+int clk_get_by_driver_info(struct udevice *dev, struct phandle_1_arg *cells,
+ struct clk *clk)
{
int ret;
- if (index != 0)
- return -ENOSYS;
- ret = uclass_get_device(UCLASS_CLK, 0, &clk->dev);
+ ret = device_get_by_driver_info((struct driver_info *)cells->node,
+ &clk->dev);
if (ret)
return ret;
- clk->id = cells[0].arg[0];
+ clk->id = cells->arg[0];
return 0;
}
@@ -63,17 +63,15 @@ int irq_read_and_clear(struct irq *irq)
}
#if CONFIG_IS_ENABLED(OF_PLATDATA)
-int irq_get_by_index_platdata(struct udevice *dev, int index,
- struct phandle_1_arg *cells, struct irq *irq)
+int irq_get_by_driver_info(struct udevice *dev,
+ struct phandle_1_arg *cells, struct irq *irq)
{
int ret;
- if (index != 0)
- return -ENOSYS;
- ret = uclass_get_device(UCLASS_IRQ, 0, &irq->dev);
+ ret = device_get_by_driver_info(cells->node, &irq->dev);
if (ret)
return ret;
- irq->id = cells[0].arg[0];
+ irq->id = cells->arg[0];
return 0;
}
@@ -437,7 +437,7 @@ static int ftsdc010_mmc_probe(struct udevice *dev)
chip->priv = dev;
chip->dev_index = 1;
memcpy(priv->minmax, dtplat->clock_freq_min_max, sizeof(priv->minmax));
- ret = clk_get_by_index_platdata(dev, 0, dtplat->clocks, &priv->clk);
+ ret = clk_get_by_driver_info(dev, dtplat->clocks, &priv->clk);
if (ret < 0)
return ret;
#endif
@@ -120,7 +120,7 @@ static int rockchip_dwmmc_probe(struct udevice *dev)
priv->minmax[0] = 400000; /* 400 kHz */
priv->minmax[1] = dtplat->max_frequency;
- ret = clk_get_by_index_platdata(dev, 0, dtplat->clocks, &priv->clk);
+ ret = clk_get_by_driver_info(dev, dtplat->clocks, &priv->clk);
if (ret < 0)
return ret;
#else
@@ -46,7 +46,7 @@ static int arasan_sdhci_probe(struct udevice *dev)
host->name = dev->name;
host->ioaddr = map_sysmem(dtplat->reg[0], dtplat->reg[1]);
max_frequency = dtplat->max_frequency;
- ret = clk_get_by_index_platdata(dev, 0, dtplat->clocks, &clk);
+ ret = clk_get_by_driver_info(dev, dtplat->clocks, &clk);
#else
max_frequency = dev_read_u32_default(dev, "max-frequency", 0);
ret = clk_get_by_index(dev, 0, &clk);
@@ -3125,7 +3125,7 @@ static int rk3399_dmc_init(struct udevice *dev)
priv->cic, priv->pmugrf, priv->pmusgrf, priv->pmucru, priv->pmu);
#if CONFIG_IS_ENABLED(OF_PLATDATA)
- ret = clk_get_by_index_platdata(dev, 0, dtplat->clocks, &priv->ddr_clk);
+ ret = clk_get_by_driver_info(dev, dtplat->clocks, &priv->ddr_clk);
#else
ret = clk_get_by_index(dev, 0, &priv->ddr_clk);
#endif
@@ -181,7 +181,7 @@ static int conv_of_platdata(struct udevice *dev)
plat->base = dtplat->reg[0];
plat->frequency = 20000000;
- ret = clk_get_by_index_platdata(dev, 0, dtplat->clocks, &priv->clk);
+ ret = clk_get_by_driver_info(dev, dtplat->clocks, &priv->clk);
if (ret < 0)
return ret;
dev->req_seq = 0;
@@ -89,8 +89,8 @@ struct clk_bulk {
#if CONFIG_IS_ENABLED(OF_CONTROL) && CONFIG_IS_ENABLED(CLK)
struct phandle_1_arg;
-int clk_get_by_index_platdata(struct udevice *dev, int index,
- struct phandle_1_arg *cells, struct clk *clk);
+int clk_get_by_driver_info(struct udevice *dev,
+ struct phandle_1_arg *cells, struct clk *clk);
/**
* clk_get_by_index - Get/request a clock by integer index.
@@ -151,6 +151,7 @@ class DtbPlatdata(object):
key: Driver alias declared with
U_BOOT_DRIVER_ALIAS(driver_alias, driver_name)
value: Driver name declared with U_BOOT_DRIVER(driver_name)
+ _links: List of links to be included in dm_populate_phandle_data()
"""
def __init__(self, dtb_fname, include_disabled, warning_disabled):
self._fdt = None
@@ -163,6 +164,7 @@ class DtbPlatdata(object):
self._aliases = {}
self._drivers = []
self._driver_aliases = {}
+ self._links = []
def get_normalized_compat_name(self, node):
"""Get a node's normalized compat name
@@ -549,7 +551,7 @@ class DtbPlatdata(object):
"""
struct_name, _ = self.get_normalized_compat_name(node)
var_name = conv_name_to_c(node.name)
- self.buf('static const struct %s%s %s%s = {\n' %
+ self.buf('static struct %s%s %s%s = {\n' %
(STRUCT_PREFIX, struct_name, VAL_PREFIX, var_name))
for pname in sorted(node.props):
prop = node.props[pname]
@@ -568,6 +570,7 @@ class DtbPlatdata(object):
if info:
# Process the list as pairs of (phandle, id)
pos = 0
+ item = 0
for args in info.args:
phandle_cell = prop.value[pos]
phandle = fdt_util.fdt32_to_cpu(phandle_cell)
@@ -577,8 +580,14 @@ class DtbPlatdata(object):
for i in range(args):
arg_values.append(str(fdt_util.fdt32_to_cpu(prop.value[pos + 1 + i])))
pos += 1 + args
- vals.append('\t{&%s%s, {%s}}' % (VAL_PREFIX, name,
- ', '.join(arg_values)))
+ # node member is filled with NULL as the real value
+ # will be update at run-time by dm_populate_phandle_data()
+ vals.append('\t{NULL, {%s}}' % (', '.join(arg_values)))
+ var_node = '%s%s.%s[%d].node' % (VAL_PREFIX, var_name, member_name, item)
+ # Save the the link information to be use to define
+ # dm_populate_phandle_data()
+ self._links.append({'var_node': var_node, 'dev_name': name})
+ item += 1
for val in vals:
self.buf('\n\t\t%s,' % val)
else:
@@ -634,6 +643,15 @@ class DtbPlatdata(object):
self.output_node(node)
nodes_to_output.remove(node)
+ # Define dm_populate_phandle_data() which will add the linking between
+ # nodes using DM_GET_DEVICE
+ # dtv_dmc_at_xxx.clocks[0].node = DM_GET_DEVICE(clock_controller_at_xxx)
+ self.buf('void dm_populate_phandle_data(void) {\n')
+ for l in self._links:
+ self.buf('\t%s = DM_GET_DEVICE(%s);\n' % (l['var_node'], l['dev_name']))
+ self.buf('}\n')
+
+ self.out(''.join(self.get_buf()))
def run_steps(args, dtb_file, include_disabled, output, warning_disabled=False):
"""Run all the steps of the dtoc tool
In the current implementation, when dtoc parses a dtb to generate a struct platdata it converts the information related to linked nodes as pointers to struct platdata of destination nodes. By doing this, it makes difficult to get pointer to udevices created based on these information. This patch extends dtoc to use struct driver_info when populating information about linked nodes, which makes it easier to later get the devices created. In this context, reimplement functions like clk_get_by_index_platdata() which made use of the previous approach. Signed-off-by: Walter Lozano <walter.lozano at collabora.com> --- drivers/clk/clk-uclass.c | 11 +++++------ drivers/misc/irq-uclass.c | 10 ++++------ drivers/mmc/ftsdc010_mci.c | 2 +- drivers/mmc/rockchip_dw_mmc.c | 2 +- drivers/mmc/rockchip_sdhci.c | 2 +- drivers/ram/rockchip/sdram_rk3399.c | 2 +- drivers/spi/rk_spi.c | 2 +- include/clk.h | 4 ++-- tools/dtoc/dtb_platdata.py | 24 +++++++++++++++++++++--- 9 files changed, 37 insertions(+), 22 deletions(-)