diff mbox series

armv8: ls1028ardb: add xspi parameter to qixis command

Message ID 20200610081350.20881-1-andy.tang@nxp.com
State Accepted
Commit c8f8830e0bae17f1163de6d413d0553ba5a67416
Headers show
Series armv8: ls1028ardb: add xspi parameter to qixis command | expand

Commit Message

Andy Tang June 10, 2020, 8:13 a.m. UTC 
From: Yuantian Tang <andy.tang at nxp.com>

Add xspi boot source to qixis command to let the soc boot from
flex-nor flash chip.

Signed-off-by: Yuantian Tang <andy.tang at nxp.com>
---
 board/freescale/common/qixis.c | 13 +++++++++++++
 include/configs/ls1028ardb.h   |  4 ++--
 2 files changed, 15 insertions(+), 2 deletions(-)
diff mbox series

Patch

diff --git a/board/freescale/common/qixis.c b/board/freescale/common/qixis.c
index dd1ee90b3c..f4a8ad78c0 100644
--- a/board/freescale/common/qixis.c
+++ b/board/freescale/common/qixis.c
@@ -322,6 +322,19 @@  static int qixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const ar
 				QIXIS_RCFG_CTL_RECONFIG_START);
 #else
 		printf("Not implemented\n");
+#endif
+	} else if (strcmp(argv[1], "xspi") == 0) {
+#ifdef QIXIS_LBMAP_XSPI
+		QIXIS_WRITE(rst_ctl, 0x30);
+		QIXIS_WRITE(rcfg_ctl, 0);
+		set_lbmap(QIXIS_LBMAP_XSPI);
+		set_rcw_src(QIXIS_RCW_SRC_XSPI);
+		qixis_write_i2c(offsetof(struct qixis, rcfg_ctl),
+				QIXIS_RCFG_CTL_RECONFIG_IDLE);
+		qixis_write_i2c(offsetof(struct qixis, rcfg_ctl),
+				QIXIS_RCFG_CTL_RECONFIG_START);
+#else
+		printf("Not implemented\n");
 #endif
 	} else if (strcmp(argv[1], "watchdog") == 0) {
 		static char *period[9] = {"2s", "4s", "8s", "16s", "32s",
diff --git a/include/configs/ls1028ardb.h b/include/configs/ls1028ardb.h
index 0f289cb078..4d65d5d38b 100644
--- a/include/configs/ls1028ardb.h
+++ b/include/configs/ls1028ardb.h
@@ -38,10 +38,10 @@ 
 #define QIXIS_LBMAP_ALTBANK		0x00
 #define QIXIS_LBMAP_SD			0x00
 #define QIXIS_LBMAP_EMMC		0x00
-#define QIXIS_LBMAP_QSPI		0x00
+#define QIXIS_LBMAP_XSPI		0x00
 #define QIXIS_RCW_SRC_SD		0xf8
 #define QIXIS_RCW_SRC_EMMC		0xf9
-#define QIXIS_RCW_SRC_QSPI		0xff
+#define QIXIS_RCW_SRC_XSPI		0xff
 #define QIXIS_RST_CTL_RESET		0x31
 #define QIXIS_RCFG_CTL_RECONFIG_IDLE	0x10
 #define QIXIS_RCFG_CTL_RECONFIG_START	0x11