| Message ID | 20200706004046.20842-16-andre.przywara@arm.com |
|---|---|
| State | New |
| Headers | show |
| Series | net: sun8i-emac fixes and cleanups | expand |
diff --git a/configs/pine_h64_defconfig b/configs/pine_h64_defconfig index 87871fd19f..fb18bb7df7 100644 --- a/configs/pine_h64_defconfig +++ b/configs/pine_h64_defconfig @@ -11,5 +11,6 @@ CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-pine-h64" CONFIG_SUN8I_EMAC=y +CONFIG_MACPWR="PC16" CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y
According to the devicetree and the schematic, the 3.3V power rail for the PHY is enabled by GPIO PC16. It's wired as active-high, with a pull-up resistor, so actually works already when the GPIO is in High-Z state. However we should not take any chances and explicitly set the GPIO pin to high, to avoid accidentally losing the PHY power. The existing MACPWR Kconfig allows to do this easily. Signed-off-by: Andre Przywara <andre.przywara at arm.com> --- configs/pine_h64_defconfig | 1 + 1 file changed, 1 insertion(+)