@@ -176,6 +176,7 @@ enum sunxi_gpio_number {
#define SUNXI_GPD_LCD0 2
#define SUNXI_GPD_LVDS0 3
#define SUNXI_GPD_PWM 2
+#define SUN50I_GPD_UART4 3
#define SUN5I_GPE_SDC2 3
#define SUN8I_GPE_TWI2 3
@@ -140,6 +140,10 @@ static int gpio_init(void)
sunxi_gpio_set_cfgpin(SUNXI_GPL(2), SUN8I_GPL_R_UART);
sunxi_gpio_set_cfgpin(SUNXI_GPL(3), SUN8I_GPL_R_UART);
sunxi_gpio_set_pull(SUNXI_GPL(3), SUNXI_GPIO_PULL_UP);
+#elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN50I)
+ sunxi_gpio_set_cfgpin(SUNXI_GPD(2), SUN50I_GPD_UART4);
+ sunxi_gpio_set_cfgpin(SUNXI_GPD(3), SUN50I_GPD_UART4);
+ sunxi_gpio_set_pull(SUNXI_GPD(3), SUNXI_GPIO_PULL_UP);
#else
#error Unsupported console port number. Please fix pin mux settings in board.c
#endif
@@ -83,7 +83,8 @@ void clock_init_sec(void)
void clock_init_uart(void)
{
-#if CONFIG_CONS_INDEX < 5
+#if CONFIG_CONS_INDEX < 5 || \
+ defined(CONFIG_MACH_SUN50I) && CONFIG_CONS_INDEX < 6
struct sunxi_ccm_reg *const ccm =
(struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
@@ -45,8 +45,12 @@
# define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE
# define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE
# define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE
+#if defined(CONFIG_MACH_SUN50I)
+# define CONFIG_SYS_NS16550_COM5 SUNXI_UART4_BASE
+#else
# define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE
#endif
+#endif
/* CPU */
#define COUNTER_FREQUENCY 24000000
Add some additional tests and definitions to be able to use UART4 of A64 and do not let it get in conflict with R_UART of some other SoCs (e.g. A23). Signed-off-by: Naz?m Gediz Ayd?ndo?mu? <gediz.aydindogmus at genemek.com> --- arch/arm/include/asm/arch-sunxi/gpio.h | 1 + arch/arm/mach-sunxi/board.c | 4 ++++ arch/arm/mach-sunxi/clock_sun6i.c | 3 ++- include/configs/sunxi-common.h | 4 ++++ 4 files changed, 11 insertions(+), 1 deletion(-)