| Message ID | 20200701165857.39930-10-Zhiqiang.Hou@nxp.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | powerpc: covert p1010, p1020 and p2020 RDB board to DM_ETH | expand |
On Thu, Jul 02, 2020 at 12:58:50AM +0800, Zhiqiang Hou wrote: > From: Hou Zhiqiang <Zhiqiang.Hou at nxp.com> > > P1020RDB implements 3 enhanced three-speed Ethernet controllers, > and the connection is shown below: > eTSEC1: Connected to RGMII switch VSC7385 > eTSEC2: Connected to SGMII PHY VSC8221 > eTSEC3: Connected to SGMII PHY AR8021 > > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou at nxp.com> > --- Reviewed-by: Vladimir Oltean <vladimir.oltean at nxp.com> > V4: > - Remove the ptp_clock node. > - Modify the change log slightly. > > arch/powerpc/dts/p1020-post.dtsi | 20 ++++++++- > arch/powerpc/dts/p1020rdb-pc.dts | 1 + > arch/powerpc/dts/p1020rdb-pc.dtsi | 55 +++++++++++++++++++++++++ > arch/powerpc/dts/p1020rdb-pc_36b.dts | 1 + > arch/powerpc/dts/p1020rdb-pd.dts | 45 ++++++++++++++++++++ > arch/powerpc/dts/pq3-etsec2-0.dtsi | 35 ++++++++++++++++ > arch/powerpc/dts/pq3-etsec2-1.dtsi | 35 ++++++++++++++++ > arch/powerpc/dts/pq3-etsec2-2.dtsi | 35 ++++++++++++++++ > arch/powerpc/dts/pq3-etsec2-grp2-0.dtsi | 16 +++++++ > arch/powerpc/dts/pq3-etsec2-grp2-1.dtsi | 16 +++++++ > arch/powerpc/dts/pq3-etsec2-grp2-2.dtsi | 16 +++++++ > 11 files changed, 273 insertions(+), 2 deletions(-) > create mode 100644 arch/powerpc/dts/p1020rdb-pc.dtsi > create mode 100644 arch/powerpc/dts/pq3-etsec2-0.dtsi > create mode 100644 arch/powerpc/dts/pq3-etsec2-1.dtsi > create mode 100644 arch/powerpc/dts/pq3-etsec2-2.dtsi > create mode 100644 arch/powerpc/dts/pq3-etsec2-grp2-0.dtsi > create mode 100644 arch/powerpc/dts/pq3-etsec2-grp2-1.dtsi > create mode 100644 arch/powerpc/dts/pq3-etsec2-grp2-2.dtsi > > diff --git a/arch/powerpc/dts/p1020-post.dtsi b/arch/powerpc/dts/p1020-post.dtsi > index 1dce8e86e9..c73539ad5c 100644 > --- a/arch/powerpc/dts/p1020-post.dtsi > +++ b/arch/powerpc/dts/p1020-post.dtsi > @@ -44,10 +44,26 @@ > clock-frequency = <0>; > }; > > - /include/ "pq3-i2c-0.dtsi" > - /include/ "pq3-i2c-1.dtsi" > +/include/ "pq3-i2c-0.dtsi" > +/include/ "pq3-i2c-1.dtsi" > + > +/include/ "pq3-etsec2-0.dtsi" > + enet0: enet0_grp2: ethernet at b0000 { > + }; > + > +/include/ "pq3-etsec2-1.dtsi" > + enet1: enet1_grp2: ethernet at b1000 { > + }; > + > +/include/ "pq3-etsec2-2.dtsi" > + enet2: enet2_grp2: ethernet at b2000 { > + }; > }; > > +/include/ "pq3-etsec2-grp2-0.dtsi" > +/include/ "pq3-etsec2-grp2-1.dtsi" > +/include/ "pq3-etsec2-grp2-2.dtsi" > + > /* PCIe controller base address 0x9000 */ > &pci1 { > compatible = "fsl,pcie-p1_p2", "fsl,pcie-fsl-qoriq"; > diff --git a/arch/powerpc/dts/p1020rdb-pc.dts b/arch/powerpc/dts/p1020rdb-pc.dts > index 7ebaa619df..715330dc50 100644 > --- a/arch/powerpc/dts/p1020rdb-pc.dts > +++ b/arch/powerpc/dts/p1020rdb-pc.dts > @@ -32,4 +32,5 @@ > }; > }; > > +/include/ "p1020rdb-pc.dtsi" > /include/ "p1020-post.dtsi" > diff --git a/arch/powerpc/dts/p1020rdb-pc.dtsi b/arch/powerpc/dts/p1020rdb-pc.dtsi > new file mode 100644 > index 0000000000..6bf424fd3f > --- /dev/null > +++ b/arch/powerpc/dts/p1020rdb-pc.dtsi > @@ -0,0 +1,55 @@ > +// SPDX-License-Identifier: GPL-2.0+ OR X11 > +/* > + * P1020 RDB-PC Device Tree Source stub (no addresses or top-level ranges) > + * > + * Copyright 2012 Freescale Semiconductor Inc. > + * Copyright 2020 NXP > + */ > + > +&soc { > + mdio at 24000 { > + phy0: ethernet-phy at 0 { > + interrupt-parent = <&mpic>; > + interrupts = <3 1 0 0>; > + reg = <0x0>; > + }; > + > + phy1: ethernet-phy at 1 { > + interrupt-parent = <&mpic>; > + interrupts = <2 1 0 0>; > + reg = <0x1>; > + }; > + > + tbi0: tbi-phy at 11 { > + device_type = "tbi-phy"; > + reg = <0x11>; > + }; > + }; > + > + mdio at 25000 { > + tbi1: tbi-phy at 11 { > + reg = <0x11>; > + device_type = "tbi-phy"; > + }; > + }; > + > + enet0: ethernet at b0000 { > + phy-connection-type = "rgmii-id"; > + fixed-link { > + speed = <1000>; > + full-duplex; > + }; > + > + }; > + > + enet1: ethernet at b1000 { > + phy-handle = <&phy0>; > + tbi-handle = <&tbi1>; > + phy-connection-type = "sgmii"; > + }; > + > + enet2: ethernet at b2000 { > + phy-handle = <&phy1>; > + phy-connection-type = "rgmii-id"; > + }; > +}; > diff --git a/arch/powerpc/dts/p1020rdb-pc_36b.dts b/arch/powerpc/dts/p1020rdb-pc_36b.dts > index c0e5ef4cf4..7680b7c7e1 100644 > --- a/arch/powerpc/dts/p1020rdb-pc_36b.dts > +++ b/arch/powerpc/dts/p1020rdb-pc_36b.dts > @@ -32,4 +32,5 @@ > }; > }; > > +/include/ "p1020rdb-pc.dtsi" > /include/ "p1020-post.dtsi" > diff --git a/arch/powerpc/dts/p1020rdb-pd.dts b/arch/powerpc/dts/p1020rdb-pd.dts > index 21174a09be..e0e8993dab 100644 > --- a/arch/powerpc/dts/p1020rdb-pd.dts > +++ b/arch/powerpc/dts/p1020rdb-pd.dts > @@ -17,6 +17,51 @@ > > soc: soc at ffe00000 { > ranges = <0x0 0x0 0xffe00000 0x100000>; > + > + mdio at 24000 { > + phy0: ethernet-phy at 0 { > + interrupts = <3 1 0 0>; > + reg = <0x0>; > + }; > + > + phy1: ethernet-phy at 1 { > + interrupts = <2 1 0 0>; > + reg = <0x1>; > + }; > + }; > + > + mdio at 25000 { > + tbi1: tbi-phy at 11 { > + reg = <0x11>; > + device_type = "tbi-phy"; > + }; > + }; > + > + mdio at 26000 { > + tbi2: tbi-phy at 11 { > + reg = <0x11>; > + device_type = "tbi-phy"; > + }; > + }; > + > + enet0: ethernet at b0000 { > + phy-connection-type = "rgmii-id"; > + fixed-link { > + speed = <1000>; > + full-duplex; > + }; > + }; > + > + enet1: ethernet at b1000 { > + phy-handle = <&phy0>; > + tbi-handle = <&tbi1>; > + phy-connection-type = "sgmii"; > + }; > + > + enet2: ethernet at b2000 { > + phy-handle = <&phy1>; > + phy-connection-type = "rgmii-id"; > + }; > }; > > pci1: pcie at ffe09000 { > diff --git a/arch/powerpc/dts/pq3-etsec2-0.dtsi b/arch/powerpc/dts/pq3-etsec2-0.dtsi > new file mode 100644 > index 0000000000..f9d3d04650 > --- /dev/null > +++ b/arch/powerpc/dts/pq3-etsec2-0.dtsi > @@ -0,0 +1,35 @@ > +// SPDX-License-Identifier: GPL-2.0+ OR X11 > +/* > + * PQ3 eTSEC2 device tree stub [ @ offsets 0x24000/0xb0000 ] > + * > + * Copyright 2011 Freescale Semiconductor Inc. > + * Copyright 2020 NXP > + */ > + > +mdio at 24000 { > + #address-cells = <1>; > + #size-cells = <0>; > + compatible = "fsl,etsec2-mdio"; > + reg = <0x24000 0x1000 0xb0030 0x4>; > +}; > + > +ethernet at b0000 { > + #address-cells = <1>; > + #size-cells = <1>; > + device_type = "network"; > + model = "eTSEC"; > + compatible = "fsl,etsec2"; > + reg = <0xb0000 0x1000>; > + fsl,num_rx_queues = <0x8>; > + fsl,num_tx_queues = <0x8>; > + fsl,magic-packet; > + local-mac-address = [ 00 00 00 00 00 00 ]; > + ranges; > + > + queue-group at b0000 { > + #address-cells = <1>; > + #size-cells = <1>; > + reg = <0xb0000 0x1000>; > + interrupts = <29 2 0 0 30 2 0 0 34 2 0 0>; > + }; > +}; > diff --git a/arch/powerpc/dts/pq3-etsec2-1.dtsi b/arch/powerpc/dts/pq3-etsec2-1.dtsi > new file mode 100644 > index 0000000000..6c01481909 > --- /dev/null > +++ b/arch/powerpc/dts/pq3-etsec2-1.dtsi > @@ -0,0 +1,35 @@ > +// SPDX-License-Identifier: GPL-2.0+ OR X11 > +/* > + * PQ3 eTSEC2 device tree stub [ @ offsets 0x25000/0xb1000 ] > + * > + * Copyright 2011 Freescale Semiconductor Inc. > + * Copyright 2020 NXP > + */ > + > +mdio at 25000 { > + #address-cells = <1>; > + #size-cells = <0>; > + compatible = "fsl,etsec2-tbi"; > + reg = <0x25000 0x1000 0xb1030 0x4>; > +}; > + > +ethernet at b1000 { > + #address-cells = <1>; > + #size-cells = <1>; > + device_type = "network"; > + model = "eTSEC"; > + compatible = "fsl,etsec2"; > + reg = <0xb1000 0x1000>; > + fsl,num_rx_queues = <0x8>; > + fsl,num_tx_queues = <0x8>; > + fsl,magic-packet; > + local-mac-address = [ 00 00 00 00 00 00 ]; > + ranges; > + > + queue-group at b1000 { > + #address-cells = <1>; > + #size-cells = <1>; > + reg = <0xb1000 0x1000>; > + interrupts = <35 2 0 0 36 2 0 0 40 2 0 0>; > + }; > +}; > diff --git a/arch/powerpc/dts/pq3-etsec2-2.dtsi b/arch/powerpc/dts/pq3-etsec2-2.dtsi > new file mode 100644 > index 0000000000..2a597c0db6 > --- /dev/null > +++ b/arch/powerpc/dts/pq3-etsec2-2.dtsi > @@ -0,0 +1,35 @@ > +// SPDX-License-Identifier: GPL-2.0+ OR X11 > +/* > + * PQ3 eTSEC2 device tree stub [ @ offsets 0x26000/0xb2000 ] > + * > + * Copyright 2011 Freescale Semiconductor Inc. > + * Copyright 2020 NXP > + */ > + > +mdio at 26000 { > + #address-cells = <1>; > + #size-cells = <0>; > + compatible = "fsl,etsec2-tbi"; > + reg = <0x26000 0x1000 0xb1030 0x4>; > +}; > + > +ethernet at b2000 { > + #address-cells = <1>; > + #size-cells = <1>; > + device_type = "network"; > + model = "eTSEC"; > + compatible = "fsl,etsec2"; > + reg = <0xb2000 0x1000>; > + fsl,num_rx_queues = <0x8>; > + fsl,num_tx_queues = <0x8>; > + fsl,magic-packet; > + local-mac-address = [ 00 00 00 00 00 00 ]; > + ranges; > + > + queue-group at b2000 { > + #address-cells = <1>; > + #size-cells = <1>; > + reg = <0xb2000 0x1000>; > + interrupts = <31 2 0 0 32 2 0 0 33 2 0 0>; > + }; > +}; > diff --git a/arch/powerpc/dts/pq3-etsec2-grp2-0.dtsi b/arch/powerpc/dts/pq3-etsec2-grp2-0.dtsi > new file mode 100644 > index 0000000000..16752a7c45 > --- /dev/null > +++ b/arch/powerpc/dts/pq3-etsec2-grp2-0.dtsi > @@ -0,0 +1,16 @@ > +// SPDX-License-Identifier: GPL-2.0+ OR X11 > +/* > + * PQ3 eTSEC2 Group 2 device tree stub [ @ offsets 0xb4000 ] > + * > + * Copyright 2011 Freescale Semiconductor Inc. > + * Copyright 2020 NXP > + */ > + > +&enet0_grp2 { > + queue-group at b4000 { > + #address-cells = <1>; > + #size-cells = <1>; > + reg = <0xb4000 0x1000>; > + interrupts = <17 2 0 0 18 2 0 0 24 2 0 0>; > + }; > +}; > diff --git a/arch/powerpc/dts/pq3-etsec2-grp2-1.dtsi b/arch/powerpc/dts/pq3-etsec2-grp2-1.dtsi > new file mode 100644 > index 0000000000..0464938424 > --- /dev/null > +++ b/arch/powerpc/dts/pq3-etsec2-grp2-1.dtsi > @@ -0,0 +1,16 @@ > +// SPDX-License-Identifier: GPL-2.0+ OR X11 > +/* > + * PQ3 eTSEC2 Group 2 device tree stub [ @ offsets 0xb5000 ] > + * > + * Copyright 2011 Freescale Semiconductor Inc. > + * Copyright 2020 NXP > + */ > + > +&enet1_grp2 { > + queue-group at b5000 { > + #address-cells = <1>; > + #size-cells = <1>; > + reg = <0xb5000 0x1000>; > + interrupts = <51 2 0 0 52 2 0 0 67 2 0 0>; > + }; > +}; > diff --git a/arch/powerpc/dts/pq3-etsec2-grp2-2.dtsi b/arch/powerpc/dts/pq3-etsec2-grp2-2.dtsi > new file mode 100644 > index 0000000000..fe8003c44a > --- /dev/null > +++ b/arch/powerpc/dts/pq3-etsec2-grp2-2.dtsi > @@ -0,0 +1,16 @@ > +// SPDX-License-Identifier: GPL-2.0+ OR X11 > +/* > + * PQ3 eTSEC2 Group 2 device tree stub [ @ offsets 0xb6000 ] > + * > + * Copyright 2011 Freescale Semiconductor Inc. > + * Copyright 2020 NXP > + */ > + > +&enet2_grp2 { > + queue-group at b6000 { > + #address-cells = <1>; > + #size-cells = <1>; > + reg = <0xb6000 0x1000>; > + interrupts = <25 2 0 0 26 2 0 0 27 2 0 0>; > + }; > +}; > -- > 2.25.1 >
diff --git a/arch/powerpc/dts/p1020-post.dtsi b/arch/powerpc/dts/p1020-post.dtsi index 1dce8e86e9..c73539ad5c 100644 --- a/arch/powerpc/dts/p1020-post.dtsi +++ b/arch/powerpc/dts/p1020-post.dtsi @@ -44,10 +44,26 @@ clock-frequency = <0>; }; - /include/ "pq3-i2c-0.dtsi" - /include/ "pq3-i2c-1.dtsi" +/include/ "pq3-i2c-0.dtsi" +/include/ "pq3-i2c-1.dtsi" + +/include/ "pq3-etsec2-0.dtsi" + enet0: enet0_grp2: ethernet at b0000 { + }; + +/include/ "pq3-etsec2-1.dtsi" + enet1: enet1_grp2: ethernet at b1000 { + }; + +/include/ "pq3-etsec2-2.dtsi" + enet2: enet2_grp2: ethernet at b2000 { + }; }; +/include/ "pq3-etsec2-grp2-0.dtsi" +/include/ "pq3-etsec2-grp2-1.dtsi" +/include/ "pq3-etsec2-grp2-2.dtsi" + /* PCIe controller base address 0x9000 */ &pci1 { compatible = "fsl,pcie-p1_p2", "fsl,pcie-fsl-qoriq"; diff --git a/arch/powerpc/dts/p1020rdb-pc.dts b/arch/powerpc/dts/p1020rdb-pc.dts index 7ebaa619df..715330dc50 100644 --- a/arch/powerpc/dts/p1020rdb-pc.dts +++ b/arch/powerpc/dts/p1020rdb-pc.dts @@ -32,4 +32,5 @@ }; }; +/include/ "p1020rdb-pc.dtsi" /include/ "p1020-post.dtsi" diff --git a/arch/powerpc/dts/p1020rdb-pc.dtsi b/arch/powerpc/dts/p1020rdb-pc.dtsi new file mode 100644 index 0000000000..6bf424fd3f --- /dev/null +++ b/arch/powerpc/dts/p1020rdb-pc.dtsi @@ -0,0 +1,55 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * P1020 RDB-PC Device Tree Source stub (no addresses or top-level ranges) + * + * Copyright 2012 Freescale Semiconductor Inc. + * Copyright 2020 NXP + */ + +&soc { + mdio at 24000 { + phy0: ethernet-phy at 0 { + interrupt-parent = <&mpic>; + interrupts = <3 1 0 0>; + reg = <0x0>; + }; + + phy1: ethernet-phy at 1 { + interrupt-parent = <&mpic>; + interrupts = <2 1 0 0>; + reg = <0x1>; + }; + + tbi0: tbi-phy at 11 { + device_type = "tbi-phy"; + reg = <0x11>; + }; + }; + + mdio at 25000 { + tbi1: tbi-phy at 11 { + reg = <0x11>; + device_type = "tbi-phy"; + }; + }; + + enet0: ethernet at b0000 { + phy-connection-type = "rgmii-id"; + fixed-link { + speed = <1000>; + full-duplex; + }; + + }; + + enet1: ethernet at b1000 { + phy-handle = <&phy0>; + tbi-handle = <&tbi1>; + phy-connection-type = "sgmii"; + }; + + enet2: ethernet at b2000 { + phy-handle = <&phy1>; + phy-connection-type = "rgmii-id"; + }; +}; diff --git a/arch/powerpc/dts/p1020rdb-pc_36b.dts b/arch/powerpc/dts/p1020rdb-pc_36b.dts index c0e5ef4cf4..7680b7c7e1 100644 --- a/arch/powerpc/dts/p1020rdb-pc_36b.dts +++ b/arch/powerpc/dts/p1020rdb-pc_36b.dts @@ -32,4 +32,5 @@ }; }; +/include/ "p1020rdb-pc.dtsi" /include/ "p1020-post.dtsi" diff --git a/arch/powerpc/dts/p1020rdb-pd.dts b/arch/powerpc/dts/p1020rdb-pd.dts index 21174a09be..e0e8993dab 100644 --- a/arch/powerpc/dts/p1020rdb-pd.dts +++ b/arch/powerpc/dts/p1020rdb-pd.dts @@ -17,6 +17,51 @@ soc: soc at ffe00000 { ranges = <0x0 0x0 0xffe00000 0x100000>; + + mdio at 24000 { + phy0: ethernet-phy at 0 { + interrupts = <3 1 0 0>; + reg = <0x0>; + }; + + phy1: ethernet-phy at 1 { + interrupts = <2 1 0 0>; + reg = <0x1>; + }; + }; + + mdio at 25000 { + tbi1: tbi-phy at 11 { + reg = <0x11>; + device_type = "tbi-phy"; + }; + }; + + mdio at 26000 { + tbi2: tbi-phy at 11 { + reg = <0x11>; + device_type = "tbi-phy"; + }; + }; + + enet0: ethernet at b0000 { + phy-connection-type = "rgmii-id"; + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + enet1: ethernet at b1000 { + phy-handle = <&phy0>; + tbi-handle = <&tbi1>; + phy-connection-type = "sgmii"; + }; + + enet2: ethernet at b2000 { + phy-handle = <&phy1>; + phy-connection-type = "rgmii-id"; + }; }; pci1: pcie at ffe09000 { diff --git a/arch/powerpc/dts/pq3-etsec2-0.dtsi b/arch/powerpc/dts/pq3-etsec2-0.dtsi new file mode 100644 index 0000000000..f9d3d04650 --- /dev/null +++ b/arch/powerpc/dts/pq3-etsec2-0.dtsi @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * PQ3 eTSEC2 device tree stub [ @ offsets 0x24000/0xb0000 ] + * + * Copyright 2011 Freescale Semiconductor Inc. + * Copyright 2020 NXP + */ + +mdio at 24000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,etsec2-mdio"; + reg = <0x24000 0x1000 0xb0030 0x4>; +}; + +ethernet at b0000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "network"; + model = "eTSEC"; + compatible = "fsl,etsec2"; + reg = <0xb0000 0x1000>; + fsl,num_rx_queues = <0x8>; + fsl,num_tx_queues = <0x8>; + fsl,magic-packet; + local-mac-address = [ 00 00 00 00 00 00 ]; + ranges; + + queue-group at b0000 { + #address-cells = <1>; + #size-cells = <1>; + reg = <0xb0000 0x1000>; + interrupts = <29 2 0 0 30 2 0 0 34 2 0 0>; + }; +}; diff --git a/arch/powerpc/dts/pq3-etsec2-1.dtsi b/arch/powerpc/dts/pq3-etsec2-1.dtsi new file mode 100644 index 0000000000..6c01481909 --- /dev/null +++ b/arch/powerpc/dts/pq3-etsec2-1.dtsi @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * PQ3 eTSEC2 device tree stub [ @ offsets 0x25000/0xb1000 ] + * + * Copyright 2011 Freescale Semiconductor Inc. + * Copyright 2020 NXP + */ + +mdio at 25000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,etsec2-tbi"; + reg = <0x25000 0x1000 0xb1030 0x4>; +}; + +ethernet at b1000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "network"; + model = "eTSEC"; + compatible = "fsl,etsec2"; + reg = <0xb1000 0x1000>; + fsl,num_rx_queues = <0x8>; + fsl,num_tx_queues = <0x8>; + fsl,magic-packet; + local-mac-address = [ 00 00 00 00 00 00 ]; + ranges; + + queue-group at b1000 { + #address-cells = <1>; + #size-cells = <1>; + reg = <0xb1000 0x1000>; + interrupts = <35 2 0 0 36 2 0 0 40 2 0 0>; + }; +}; diff --git a/arch/powerpc/dts/pq3-etsec2-2.dtsi b/arch/powerpc/dts/pq3-etsec2-2.dtsi new file mode 100644 index 0000000000..2a597c0db6 --- /dev/null +++ b/arch/powerpc/dts/pq3-etsec2-2.dtsi @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * PQ3 eTSEC2 device tree stub [ @ offsets 0x26000/0xb2000 ] + * + * Copyright 2011 Freescale Semiconductor Inc. + * Copyright 2020 NXP + */ + +mdio at 26000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,etsec2-tbi"; + reg = <0x26000 0x1000 0xb1030 0x4>; +}; + +ethernet at b2000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "network"; + model = "eTSEC"; + compatible = "fsl,etsec2"; + reg = <0xb2000 0x1000>; + fsl,num_rx_queues = <0x8>; + fsl,num_tx_queues = <0x8>; + fsl,magic-packet; + local-mac-address = [ 00 00 00 00 00 00 ]; + ranges; + + queue-group at b2000 { + #address-cells = <1>; + #size-cells = <1>; + reg = <0xb2000 0x1000>; + interrupts = <31 2 0 0 32 2 0 0 33 2 0 0>; + }; +}; diff --git a/arch/powerpc/dts/pq3-etsec2-grp2-0.dtsi b/arch/powerpc/dts/pq3-etsec2-grp2-0.dtsi new file mode 100644 index 0000000000..16752a7c45 --- /dev/null +++ b/arch/powerpc/dts/pq3-etsec2-grp2-0.dtsi @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * PQ3 eTSEC2 Group 2 device tree stub [ @ offsets 0xb4000 ] + * + * Copyright 2011 Freescale Semiconductor Inc. + * Copyright 2020 NXP + */ + +&enet0_grp2 { + queue-group at b4000 { + #address-cells = <1>; + #size-cells = <1>; + reg = <0xb4000 0x1000>; + interrupts = <17 2 0 0 18 2 0 0 24 2 0 0>; + }; +}; diff --git a/arch/powerpc/dts/pq3-etsec2-grp2-1.dtsi b/arch/powerpc/dts/pq3-etsec2-grp2-1.dtsi new file mode 100644 index 0000000000..0464938424 --- /dev/null +++ b/arch/powerpc/dts/pq3-etsec2-grp2-1.dtsi @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * PQ3 eTSEC2 Group 2 device tree stub [ @ offsets 0xb5000 ] + * + * Copyright 2011 Freescale Semiconductor Inc. + * Copyright 2020 NXP + */ + +&enet1_grp2 { + queue-group at b5000 { + #address-cells = <1>; + #size-cells = <1>; + reg = <0xb5000 0x1000>; + interrupts = <51 2 0 0 52 2 0 0 67 2 0 0>; + }; +}; diff --git a/arch/powerpc/dts/pq3-etsec2-grp2-2.dtsi b/arch/powerpc/dts/pq3-etsec2-grp2-2.dtsi new file mode 100644 index 0000000000..fe8003c44a --- /dev/null +++ b/arch/powerpc/dts/pq3-etsec2-grp2-2.dtsi @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * PQ3 eTSEC2 Group 2 device tree stub [ @ offsets 0xb6000 ] + * + * Copyright 2011 Freescale Semiconductor Inc. + * Copyright 2020 NXP + */ + +&enet2_grp2 { + queue-group at b6000 { + #address-cells = <1>; + #size-cells = <1>; + reg = <0xb6000 0x1000>; + interrupts = <25 2 0 0 26 2 0 0 27 2 0 0>; + }; +};