@@ -11,6 +11,7 @@
#include <asm/mrccache.h>
#include <asm/mtrr.h>
#include <asm/post.h>
+#include <dm/ofnode.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -91,6 +92,8 @@ unsigned int install_e820_map(unsigned int max_entries,
unsigned int num_entries = 0;
const struct hob_header *hdr;
struct hob_res_desc *res_desc;
+ const fdt64_t *prop;
+ int size;
hdr = gd->arch.hob_list;
@@ -127,6 +130,19 @@ unsigned int install_e820_map(unsigned int max_entries,
entries[num_entries].type = E820_RESERVED;
num_entries++;
#endif
+ prop = ofnode_get_chosen_prop("e820-entries", &size);
+ if (prop) {
+ int count = size / (sizeof(u64) * 3);
+ int i;
+
+ if (num_entries + count >= max_entries)
+ return -ENOSPC;
+ for (i = 0; i < count; i++, num_entries++, prop += 3) {
+ entries[num_entries].addr = fdt64_to_cpu(prop[0]);
+ entries[num_entries].size = fdt64_to_cpu(prop[1]);
+ entries[num_entries].type = fdt64_to_cpu(prop[2]);
+ }
+ }
return num_entries;
}
@@ -143,3 +143,21 @@ This provides the ordering to use when writing device data to the ACPI SSDT
node to add. The ACPI information is written in this order.
If the ordering does not include all nodes, an error is generated.
+
+e820-entries
+------------
+
+This provides a way to add entries to the e820 table which tells the OS about
+the memory map. The property contains three sets of 64-bit values:
+
+ address - Start address of region
+ size - Size of region
+ flags - Flags (E820_...)
+
+Example:
+
+chosen {
+ e820-entries = /bits/ 64 <
+ IOMAP_P2SB_BAR IOMAP P2SB_SIZE E820_RESERVED
+ MCH_BASE_ADDRESS MCH_SIZE E820_RESERVED>;
+};
Some boards want to reserve extra regions of memory. Add a 'chosen' property to support this. Signed-off-by: Simon Glass <sjg at chromium.org> --- arch/x86/lib/fsp/fsp_dram.c | 16 ++++++++++++++++ doc/device-tree-bindings/chosen.txt | 18 ++++++++++++++++++ 2 files changed, 34 insertions(+)