| Message ID | 20200117110201.15959-3-giulio.benetti@benettiengineering.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | fix pllv3 defects reported by Coverity | expand |
diff --git a/drivers/clk/imx/clk-pllv3.c b/drivers/clk/imx/clk-pllv3.c index 0d8e39cfbb..d2bb1e86e1 100644 --- a/drivers/clk/imx/clk-pllv3.c +++ b/drivers/clk/imx/clk-pllv3.c @@ -163,6 +163,9 @@ static ulong clk_pllv3_av_get_rate(struct clk *clk) u32 div = readl(pll->base) & pll->div_mask; u64 temp64 = (u64)parent_rate; + if (mfd == 0) + return -EIO; + temp64 *= mfn; do_div(temp64, mfd);
Guard 'mfd==0' to prevent 'divide by zero' issue in clk_pplv3_av_get_rate() and returning early with error EIO since mfd should never be 0 at all. Signed-off-by: Giulio Benetti <giulio.benetti at benettiengineering.com> --- drivers/clk/imx/clk-pllv3.c | 3 +++ 1 file changed, 3 insertions(+)