diff mbox series

[v2,2/3] arm: caches: add DCACHE_DEFAULT_OPTION

Message ID 20200424201957.v2.2.Ib6abcb05422a74bc6bc03daa71b15c98c99dbc5d@changeid
State Accepted
Commit 2e8d68e241b35d383a057b014287a756624a32bc
Headers show
Series arm: caches: allow to activate dcache in SPL and in U-Boot pre-reloc | expand

Commit Message

Patrick Delaunay April 24, 2020, 6:20 p.m. UTC
Add the new flags DCACHE_DEFAULT_OPTION to define the default
option to use according the compilation flags
CONFIG_SYS_ARM_CACHE_*.

This new compilation flag allows to simplify dram_bank_mmu_setup()
and can be used as third parameter (option=dcache option to select)
of mmu_set_region_dcache_behaviour function.

Signed-off-by: Patrick Delaunay <patrick.delaunay at st.com>
---
CONFIG_SYS_ARM_CACHE_WRITEBACK dependency with
[v2] configs: migrate CONFIG_SYS_ARM_CACHE_* in Kconfig
http://patchwork.ozlabs.org/patch/1269103/


Changes in v2: None

 arch/arm/include/asm/system.h |  8 ++++++++
 arch/arm/lib/cache-cp15.c     | 11 ++---------
 2 files changed, 10 insertions(+), 9 deletions(-)

Comments

Tom Rini May 1, 2020, 9:56 p.m. UTC | #1
On Fri, Apr 24, 2020 at 08:20:16PM +0200, Patrick Delaunay wrote:

> Add the new flags DCACHE_DEFAULT_OPTION to define the default
> option to use according the compilation flags
> CONFIG_SYS_ARM_CACHE_*.
> 
> This new compilation flag allows to simplify dram_bank_mmu_setup()
> and can be used as third parameter (option=dcache option to select)
> of mmu_set_region_dcache_behaviour function.
> 
> Signed-off-by: Patrick Delaunay <patrick.delaunay at st.com>

Applied to u-boot/master, thanks!
diff mbox series

Patch

diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 81ccead112..a3147fde14 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -485,6 +485,14 @@  enum dcache_option {
 };
 #endif
 
+#if defined(CONFIG_SYS_ARM_CACHE_WRITETHROUGH)
+#define DCACHE_DEFAULT_OPTION	DCACHE_WRITETHROUGH
+#elif defined(CONFIG_SYS_ARM_CACHE_WRITEALLOC)
+#define DCACHE_DEFAULT_OPTION	DCACHE_WRITEALLOC
+#elif defined(CONFIG_SYS_ARM_CACHE_WRITEBACK)
+#define DCACHE_DEFAULT_OPTION	DCACHE_WRITEBACK
+#endif
+
 /* Size of an MMU section */
 enum {
 #ifdef CONFIG_ARMV7_LPAE
diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
index 54509f11c3..d15144188b 100644
--- a/arch/arm/lib/cache-cp15.c
+++ b/arch/arm/lib/cache-cp15.c
@@ -99,15 +99,8 @@  __weak void dram_bank_mmu_setup(int bank)
 	for (i = bd->bi_dram[bank].start >> MMU_SECTION_SHIFT;
 	     i < (bd->bi_dram[bank].start >> MMU_SECTION_SHIFT) +
 		 (bd->bi_dram[bank].size >> MMU_SECTION_SHIFT);
-	     i++) {
-#if defined(CONFIG_SYS_ARM_CACHE_WRITETHROUGH)
-		set_section_dcache(i, DCACHE_WRITETHROUGH);
-#elif defined(CONFIG_SYS_ARM_CACHE_WRITEALLOC)
-		set_section_dcache(i, DCACHE_WRITEALLOC);
-#else
-		set_section_dcache(i, DCACHE_WRITEBACK);
-#endif
-	}
+	     i++)
+		set_section_dcache(i, DCACHE_DEFAULT_OPTION);
 }
 
 /* to activate the MMU we need to set up virtual memory: use 1M areas */