diff mbox series

riscv: Move all SMP related SBI calls to SBI_v01

Message ID 20200421215157.440457-1-atish.patra@wdc.com
State Accepted
Commit 7e249bc13aaf204a08e70044ebba04f404f6cf85
Headers show
Series riscv: Move all SMP related SBI calls to SBI_v01 | expand

Commit Message

Atish Patra April 21, 2020, 9:51 p.m. UTC 
SMP support for S-mode U-Boot is enabled only if SBI_V01 is enabled.
There is no point in supporting SMP related (IPI and fences) SBI calls
when SBI_V02 is enabled.

Modify all the SMP related SBI calls to be defined only for SBI_V01.

Signed-off-by: Atish Patra <atish.patra at wdc.com>
---
 arch/riscv/include/asm/sbi.h |  5 ++---
 arch/riscv/lib/sbi.c         | 37 ++++++++++++++++++------------------
 2 files changed, 20 insertions(+), 22 deletions(-)

Comments

Bin Meng April 23, 2020, 10:43 a.m. UTC | #1 
On Wed, Apr 22, 2020 at 5:52 AM Atish Patra <atish.patra at wdc.com> wrote:
>
> SMP support for S-mode U-Boot is enabled only if SBI_V01 is enabled.
> There is no point in supporting SMP related (IPI and fences) SBI calls
> when SBI_V02 is enabled.
>
> Modify all the SMP related SBI calls to be defined only for SBI_V01.
>
> Signed-off-by: Atish Patra <atish.patra at wdc.com>
> ---
>  arch/riscv/include/asm/sbi.h |  5 ++---
>  arch/riscv/lib/sbi.c         | 37 ++++++++++++++++++------------------
>  2 files changed, 20 insertions(+), 22 deletions(-)
>

Reviewed-by: Bin Meng <bmeng.cn at gmail.com>
diff mbox series

Patch

diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
index 3595ee8bf7ee..453cb5cec5eb 100644
--- a/arch/riscv/include/asm/sbi.h
+++ b/arch/riscv/include/asm/sbi.h
@@ -106,8 +106,6 @@  void sbi_console_putchar(int ch);
 int sbi_console_getchar(void);
 void sbi_clear_ipi(void);
 void sbi_shutdown(void);
-#endif
-void sbi_set_timer(uint64_t stime_value);
 void sbi_send_ipi(const unsigned long *hart_mask);
 void sbi_remote_fence_i(const unsigned long *hart_mask);
 void sbi_remote_sfence_vma(const unsigned long *hart_mask,
@@ -117,7 +115,8 @@  void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask,
 				unsigned long start,
 				unsigned long size,
 				unsigned long asid);
-
+#endif
+void sbi_set_timer(uint64_t stime_value);
 int sbi_probe_extension(int ext);
 
 #endif
diff --git a/arch/riscv/lib/sbi.c b/arch/riscv/lib/sbi.c
index 7bdf071dbbe5..993597e33db1 100644
--- a/arch/riscv/lib/sbi.c
+++ b/arch/riscv/lib/sbi.c
@@ -39,6 +39,23 @@  struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0,
 	return ret;
 }
 
+/**
+ * sbi_set_timer() - Program the timer for next timer event.
+ * @stime_value: The value after which next timer event should fire.
+ *
+ * Return: None
+ */
+void sbi_set_timer(uint64_t stime_value)
+{
+#if __riscv_xlen == 32
+	sbi_ecall(SBI_EXT_SET_TIMER, SBI_FID_SET_TIMER, stime_value,
+		  stime_value >> 32, 0, 0, 0, 0);
+#else
+	sbi_ecall(SBI_EXT_SET_TIMER, SBI_FID_SET_TIMER, stime_value,
+		  0, 0, 0, 0, 0);
+#endif
+}
+
 #ifdef CONFIG_SBI_V01
 
 /**
@@ -86,25 +103,6 @@  void sbi_shutdown(void)
 	sbi_ecall(SBI_EXT_0_1_SHUTDOWN, 0, 0, 0, 0, 0, 0, 0);
 }
 
-#endif /* CONFIG_SBI_V01 */
-
-/**
- * sbi_set_timer() - Program the timer for next timer event.
- * @stime_value: The value after which next timer event should fire.
- *
- * Return: None
- */
-void sbi_set_timer(uint64_t stime_value)
-{
-#if __riscv_xlen == 32
-	sbi_ecall(SBI_EXT_SET_TIMER, SBI_FID_SET_TIMER, stime_value,
-		  stime_value >> 32, 0, 0, 0, 0);
-#else
-	sbi_ecall(SBI_EXT_SET_TIMER, SBI_FID_SET_TIMER, stime_value,
-		  0, 0, 0, 0, 0);
-#endif
-}
-
 /**
  * sbi_send_ipi() - Send an IPI to any hart.
  * @hart_mask: A cpu mask containing all the target harts.
@@ -185,3 +183,4 @@  int sbi_probe_extension(int extid)
 
 	return -ENOTSUPP;
 }
+#endif /* CONFIG_SBI_V01 */