diff mbox series

[7/9] board: st: stpmic1: add function stmpic_buck1_set

Message ID 20200421171123.7.Ibcf2b148dc7ba271546063667955e82cf997d7ee@changeid
State New
Headers show
Series stm32mp1: use OPP information for PLL1 settings in SPL | expand

Commit Message

Patrick Delaunay April 21, 2020, 3:11 p.m. UTC 
Add a function stmpic_buck1_set to configure buck1 voltage
in SPL as regulator framework is not available.

Signed-off-by: Patrick Delaunay <patrick.delaunay at st.com>
---

 board/st/common/stpmic1.c | 24 ++++++++++++++++++++++++
 board/st/common/stpmic1.h |  6 ++++++
 2 files changed, 30 insertions(+)
 create mode 100644 board/st/common/stpmic1.h

Comments

Patrice CHOTARD May 11, 2020, 1:54 p.m. UTC | #1 
Hi Patrick

On 4/21/20 5:11 PM, Patrick Delaunay wrote:
> Add a function stmpic_buck1_set to configure buck1 voltage
> in SPL as regulator framework is not available.
>
> Signed-off-by: Patrick Delaunay <patrick.delaunay at st.com>
> ---
>
>  board/st/common/stpmic1.c | 24 ++++++++++++++++++++++++
>  board/st/common/stpmic1.h |  6 ++++++
>  2 files changed, 30 insertions(+)
>  create mode 100644 board/st/common/stpmic1.h
>
> diff --git a/board/st/common/stpmic1.c b/board/st/common/stpmic1.c
> index ca10a2246b..a912242ad9 100644
> --- a/board/st/common/stpmic1.c
> +++ b/board/st/common/stpmic1.c
> @@ -9,6 +9,30 @@
>  #include <power/pmic.h>
>  #include <power/stpmic1.h>
>  
> +int stmpic_buck1_set(u32 voltage_mv)
> +{
> +	struct udevice *dev;
> +	int ret;
> +	u32 value;
> +
> +	ret = uclass_get_device_by_driver(UCLASS_PMIC,
> +					  DM_GET_DRIVER(pmic_stpmic1), &dev);
> +	if (ret)
> +		return ret;
> +
> +	/* VDDCORE= STMPCI1 BUCK1 ramp=+25mV, 5 => 725mV, 36 => 1500mV */
> +	value = ((voltage_mv - 725) / 25) + 5;
> +	if (value < 5)
> +		value = 5;
> +	if (value > 36)
> +		value = 36;
> +
> +	return pmic_clrsetbits(dev,
> +			       STPMIC1_BUCKX_MAIN_CR(STPMIC1_BUCK1),
> +			       STPMIC1_BUCK_VOUT_MASK,
> +			       STPMIC1_BUCK_VOUT(value));
> +}
> +
>  int board_ddr_power_init(enum ddr_type ddr_type)
>  {
>  	struct udevice *dev;
> diff --git a/board/st/common/stpmic1.h b/board/st/common/stpmic1.h
> new file mode 100644
> index 0000000000..a020dddbe0
> --- /dev/null
> +++ b/board/st/common/stpmic1.h
> @@ -0,0 +1,6 @@
> +/* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
> +/*
> + * Copyright (C) 2020, STMicroelectronics - All Rights Reserved
> + */
> +
> +int stmpic_buck1_set(u32 voltage_mv);


Reviewed-by: Patrice Chotard <patrice.chotard at st.com>

Thanks

Patrice
diff mbox series

Patch

diff --git a/board/st/common/stpmic1.c b/board/st/common/stpmic1.c
index ca10a2246b..a912242ad9 100644
--- a/board/st/common/stpmic1.c
+++ b/board/st/common/stpmic1.c
@@ -9,6 +9,30 @@ 
 #include <power/pmic.h>
 #include <power/stpmic1.h>
 
+int stmpic_buck1_set(u32 voltage_mv)
+{
+	struct udevice *dev;
+	int ret;
+	u32 value;
+
+	ret = uclass_get_device_by_driver(UCLASS_PMIC,
+					  DM_GET_DRIVER(pmic_stpmic1), &dev);
+	if (ret)
+		return ret;
+
+	/* VDDCORE= STMPCI1 BUCK1 ramp=+25mV, 5 => 725mV, 36 => 1500mV */
+	value = ((voltage_mv - 725) / 25) + 5;
+	if (value < 5)
+		value = 5;
+	if (value > 36)
+		value = 36;
+
+	return pmic_clrsetbits(dev,
+			       STPMIC1_BUCKX_MAIN_CR(STPMIC1_BUCK1),
+			       STPMIC1_BUCK_VOUT_MASK,
+			       STPMIC1_BUCK_VOUT(value));
+}
+
 int board_ddr_power_init(enum ddr_type ddr_type)
 {
 	struct udevice *dev;
diff --git a/board/st/common/stpmic1.h b/board/st/common/stpmic1.h
new file mode 100644
index 0000000000..a020dddbe0
--- /dev/null
+++ b/board/st/common/stpmic1.h
@@ -0,0 +1,6 @@ 
+/* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
+/*
+ * Copyright (C) 2020, STMicroelectronics - All Rights Reserved
+ */
+
+int stmpic_buck1_set(u32 voltage_mv);