diff mbox series

[RESEND,v3,6/7] x86: Add a way to detect running from coreboot

Message ID 20200408185755.116336-6-sjg@chromium.org
State Superseded
Headers show
Series x86: Improve support for chain-loading U-Boot | expand

Commit Message

Simon Glass April 8, 2020, 6:57 p.m. UTC
If U-Boot is running from coreboot we need to skip low-level init. Add
an way to detect this and to set the gd flag.

Signed-off-by: Simon Glass <sjg at chromium.org>
---

Changes in v3:
- Add new patch to detect running from coreboot

Changes in v2: None

 arch/x86/cpu/i386/cpu.c           | 15 +++++++++++++++
 arch/x86/include/asm/u-boot-x86.h |  7 +++++++
 2 files changed, 22 insertions(+)

Comments

Bin Meng April 23, 2020, 11:02 a.m. UTC | #1
Hi Simon,

On Thu, Apr 9, 2020 at 2:58 AM Simon Glass <sjg at chromium.org> wrote:
>
> If U-Boot is running from coreboot we need to skip low-level init. Add
> an way to detect this and to set the gd flag.
>
> Signed-off-by: Simon Glass <sjg at chromium.org>
> ---
>
> Changes in v3:
> - Add new patch to detect running from coreboot
>
> Changes in v2: None
>
>  arch/x86/cpu/i386/cpu.c           | 15 +++++++++++++++
>  arch/x86/include/asm/u-boot-x86.h |  7 +++++++
>  2 files changed, 22 insertions(+)
>
> diff --git a/arch/x86/cpu/i386/cpu.c b/arch/x86/cpu/i386/cpu.c
> index c8da7f10e9b..e43444c090b 100644
> --- a/arch/x86/cpu/i386/cpu.c
> +++ b/arch/x86/cpu/i386/cpu.c
> @@ -447,10 +447,25 @@ int x86_cpu_init_f(void)
>         return 0;
>  }
>
> +bool x86_detect_coreboot(void)
> +{
> +       u32 *ptr, *end;
> +
> +       /* We look for LBIO in the first 4K of RAM */
> +       for (ptr = NULL, end = ptr + 0x400; ptr < end; ptr += 4) {

The logic here is not exactly the same as cb_parse_header(). I believe
we should be consistent.

> +               if (*ptr == 0x4f49424c) /* "LBIO" */
> +                       return true;
> +       }
> +
> +       return false;
> +}
> +
>  int x86_cpu_reinit_f(void)
>  {
>         setup_identity();
>         setup_pci_ram_top();
> +       if (x86_detect_coreboot())
> +               gd->flags |= GD_FLG_NO_LL_INIT;
>
>         return 0;
>  }
> diff --git a/arch/x86/include/asm/u-boot-x86.h b/arch/x86/include/asm/u-boot-x86.h
> index 3e5d56d0757..654880f91cb 100644
> --- a/arch/x86/include/asm/u-boot-x86.h
> +++ b/arch/x86/include/asm/u-boot-x86.h
> @@ -43,6 +43,13 @@ int x86_cpu_reinit_f(void);
>   */
>  int x86_cpu_init_tpl(void);
>
> +/**
> + * x86_detect_coreboot() - See if U-Boot is being started from coreboot
> + *
> + * @return true if coreboot is running, false if U-Boot is running 'bare-metal'
> + */
> +bool x86_detect_coreboot(void);
> +
>  int cpu_init_f(void);
>  void setup_gdt(struct global_data *id, u64 *gdt_addr);
>  /*
> --

Regards,
Bin
diff mbox series

Patch

diff --git a/arch/x86/cpu/i386/cpu.c b/arch/x86/cpu/i386/cpu.c
index c8da7f10e9b..e43444c090b 100644
--- a/arch/x86/cpu/i386/cpu.c
+++ b/arch/x86/cpu/i386/cpu.c
@@ -447,10 +447,25 @@  int x86_cpu_init_f(void)
 	return 0;
 }
 
+bool x86_detect_coreboot(void)
+{
+	u32 *ptr, *end;
+
+	/* We look for LBIO in the first 4K of RAM */
+	for (ptr = NULL, end = ptr + 0x400; ptr < end; ptr += 4) {
+		if (*ptr == 0x4f49424c) /* "LBIO" */
+			return true;
+	}
+
+	return false;
+}
+
 int x86_cpu_reinit_f(void)
 {
 	setup_identity();
 	setup_pci_ram_top();
+	if (x86_detect_coreboot())
+		gd->flags |= GD_FLG_NO_LL_INIT;
 
 	return 0;
 }
diff --git a/arch/x86/include/asm/u-boot-x86.h b/arch/x86/include/asm/u-boot-x86.h
index 3e5d56d0757..654880f91cb 100644
--- a/arch/x86/include/asm/u-boot-x86.h
+++ b/arch/x86/include/asm/u-boot-x86.h
@@ -43,6 +43,13 @@  int x86_cpu_reinit_f(void);
  */
 int x86_cpu_init_tpl(void);
 
+/**
+ * x86_detect_coreboot() - See if U-Boot is being started from coreboot
+ *
+ * @return true if coreboot is running, false if U-Boot is running 'bare-metal'
+ */
+bool x86_detect_coreboot(void);
+
 int cpu_init_f(void);
 void setup_gdt(struct global_data *id, u64 *gdt_addr);
 /*