[v2,21/21] configs: socfpga: Add defconfig for Agilex and Stratix 10 without ATF support

Message ID	1582115146-28658-22-git-send-email-chee.hong.ang@intel.com
State	Superseded
Headers	show List-Id: U-Boot discussion <u-boot.lists.denx.de> From: chee.hong.ang at intel.com (chee.hong.ang at intel.com) Date: Wed, 19 Feb 2020 04:25:46 -0800 Subject: [PATCH v2 21/21] configs: socfpga: Add defconfig for Agilex and Stratix 10 without ATF support In-Reply-To: <1582115146-28658-1-git-send-email-chee.hong.ang@intel.com> References: <1582115146-28658-1-git-send-email-chee.hong.ang@intel.com> Message-ID: <1582115146-28658-22-git-send-email-chee.hong.ang@intel.com>
Series	Enable ARM Trusted Firmware for U-Boot \| expand [v2,00/21] Enable ARM Trusted Firmware for U-Boot [v2,01/21] configs: agilex: Remove CONFIG_OF_EMBED [v2,02/21] arm: socfpga: add fit source file for pack itb with ATF [v2,03/21] arm: socfpga: Add function for checking description from FIT image [v2,04/21] arm: socfpga: Load FIT image with ATF support [v2,05/21] arm: socfpga: Override 'lowlevel_init' to support ATF [v2,06/21] configs: socfpga: Enable FIT image loading with ATF support [v2,07/21] arm: socfpga: Disable "spin-table" method for booting Linux [v2,08/21] arm: socfpga: Add SMC helper function for Intel SOCFPGA (64bits) [v2,09/21] arm: socfpga: Define SMC function identifiers for PSCI SiP services [v2,10/21] arm: socfpga: Add secure register access helper functions for SoC 64bits [v2,11/21] arm: socfpga: Secure register access for clock manager (SoC 64bits) [v2,12/21] arm: socfpga: Secure register access in PHY mode setup [v2,13/21] arm: socfpga: Secure register access for reading PLL frequency [v2,14/21] mmc: dwmmc: socfpga: Secure register access in MMC driver [v2,15/21] net: designware: socfpga: Secure register access in MAC driver [v2,16/21] arm: socfpga: Secure register access in Reset Manager driver [v2,17/21] arm: socfpga: stratix10: Initialize timer in SPL [v2,18/21] arm: socfpga: Bridge reset invokes SMC service calls in EL2 [v2,19/21] arm: socfpga: stratix10: Add ATF support to FPGA reconfig driver [v2,20/21] arm: socfpga: mailbox: Add 'SYSTEM_RESET' PSCI support to mbox_reset_cold() [v2,21/21] configs: socfpga: Add defconfig for Agilex and Stratix 10 without ATF support

diff --git a/configs/socfpga_agilex_nofw_defconfig b/configs/socfpga_agilex_nofw_defconfig new file mode 100644 index 0000000..3d63f8b --- /dev/null +++ b/configs/socfpga_agilex_nofw_defconfig @@ -0,0 +1,59 @@ +CONFIG_ARM=y +CONFIG_ARCH_SOCFPGA=y +CONFIG_SYS_TEXT_BASE=0x1000 +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_ENV_SIZE=0x1000 +CONFIG_ENV_OFFSET=0x200 +CONFIG_DM_GPIO=y +CONFIG_NR_DRAM_BANKS=2 +CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK=y +CONFIG_IDENT_STRING="socfpga_agilex" +CONFIG_SPL_FS_FAT=y +# CONFIG_PSCI_RESET is not set +CONFIG_SPL_TEXT_BASE=0xFFE00000 +CONFIG_BOOTDELAY=5 +CONFIG_SPL_CACHE=y +CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_SPI_U_BOOT_OFFS=0x3c00000 +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # " +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SPI=y +CONFIG_CMD_USB=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk" +CONFIG_ENV_IS_IN_MMC=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_SPL_ALTERA_SDRAM=y +CONFIG_DWAPB_GPIO=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_DW=y +CONFIG_DM_MMC=y +CONFIG_MMC_DW=y +CONFIG_SF_DEFAULT_MODE=0x2003 +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_PHY_MICREL=y +CONFIG_PHY_MICREL_KSZ90X1=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y +CONFIG_DM_RESET=y +CONFIG_SPI=y +CONFIG_CADENCE_QSPI=y +CONFIG_DESIGNWARE_SPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_DWC2=y +CONFIG_USB_STORAGE=y +# CONFIG_SPL_USE_TINY_PRINTF is not set diff --git a/configs/socfpga_stratix10_nofw_defconfig b/configs/socfpga_stratix10_nofw_defconfig new file mode 100644 index 0000000..22169a2 --- /dev/null +++ b/configs/socfpga_stratix10_nofw_defconfig @@ -0,0 +1,63 @@ +CONFIG_ARM=y +CONFIG_ARCH_SOCFPGA=y +CONFIG_SYS_TEXT_BASE=0x1000 +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_ENV_SIZE=0x1000 +CONFIG_ENV_OFFSET=0x200 +CONFIG_DM_GPIO=y +CONFIG_NR_DRAM_BANKS=2 +CONFIG_TARGET_SOCFPGA_STRATIX10_SOCDK=y +CONFIG_IDENT_STRING="socfpga_stratix10" +CONFIG_SPL_FS_FAT=y +# CONFIG_PSCI_RESET is not set +CONFIG_SPL_TEXT_BASE=0xFFE00000 +CONFIG_BOOTDELAY=5 +CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_SPI_U_BOOT_OFFS=0x3C00000 +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="SOCFPGA_STRATIX10 # " +CONFIG_CMD_MEMTEST=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SPI=y +CONFIG_CMD_USB=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_stratix10_socdk" +CONFIG_ENV_IS_IN_MMC=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_SPL_ALTERA_SDRAM=y +CONFIG_DWAPB_GPIO=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_DW=y +CONFIG_DM_MMC=y +CONFIG_MMC_DW=y +CONFIG_MTD=y +CONFIG_SF_DEFAULT_MODE=0x2003 +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_PHY_MICREL=y +CONFIG_PHY_MICREL_KSZ90X1=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y +CONFIG_DM_RESET=y +CONFIG_SPI=y +CONFIG_CADENCE_QSPI=y +CONFIG_DESIGNWARE_SPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_DWC2=y +CONFIG_USB_STORAGE=y +CONFIG_DESIGNWARE_WATCHDOG=y +CONFIG_WDT=y +# CONFIG_SPL_USE_TINY_PRINTF is not set

[v2,21/21] configs: socfpga: Add defconfig for Agilex and Stratix 10 without ATF support

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Patch