| Message ID | 1386185609-25505-9-git-send-email-peter.maydell@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
On 12/05/2013 08:33 AM, Peter Maydell wrote: > @@ -680,6 +720,7 @@ void gen_intermediate_code_internal_a64(ARMCPU *cpu, > dc->condjmp = 0; > > dc->aarch64 = 1; > + dc->tmp_a64_count = 0; > dc->thumb = 0; > dc->bswap_code = 0; > dc->condexec_mask = 0; Still no initialization of ->tmp_a64[]? r~
On 4 December 2013 21:55, Richard Henderson <rth@twiddle.net> wrote: > On 12/05/2013 08:33 AM, Peter Maydell wrote: >> @@ -680,6 +720,7 @@ void gen_intermediate_code_internal_a64(ARMCPU *cpu, >> dc->condjmp = 0; >> >> dc->aarch64 = 1; >> + dc->tmp_a64_count = 0; >> dc->thumb = 0; >> dc->bswap_code = 0; >> dc->condexec_mask = 0; > > Still no initialization of ->tmp_a64[]? It doesn't need initialization, does it? It's a static array, and we fill it as new temps are requested. So all we need to do is clear the count so it starts "empty". Or have I missed something? thanks -- PMM
On 12/05/2013 11:14 AM, Peter Maydell wrote: > On 4 December 2013 21:55, Richard Henderson <rth@twiddle.net> wrote: >> On 12/05/2013 08:33 AM, Peter Maydell wrote: >>> @@ -680,6 +720,7 @@ void gen_intermediate_code_internal_a64(ARMCPU *cpu, >>> dc->condjmp = 0; >>> >>> dc->aarch64 = 1; >>> + dc->tmp_a64_count = 0; >>> dc->thumb = 0; >>> dc->bswap_code = 0; >>> dc->condexec_mask = 0; >> >> Still no initialization of ->tmp_a64[]? > > It doesn't need initialization, does it? It's a static array, and we > fill it as new temps are requested. So all we need to do is clear > the count so it starts "empty". Or have I missed something? Well, barring bugs, no. But I suggested clearing to TCGV_UNUSED for --enable-tcg-debug at minimum so as to catch those. r~
On 4 December 2013 22:29, Richard Henderson <rth@twiddle.net> wrote: > On 12/05/2013 11:14 AM, Peter Maydell wrote: >> It doesn't need initialization, does it? It's a static array, and we >> fill it as new temps are requested. So all we need to do is clear >> the count so it starts "empty". Or have I missed something? > > Well, barring bugs, no. > > But I suggested clearing to TCGV_UNUSED for --enable-tcg-debug at minimum so as > to catch those. Bugs in the alloc/free code don't seem very likely since they're very small functions which never change, but I guess it won't hurt. -- PMM
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c index 1e2b371..b413966 100644 --- a/target-arm/translate-a64.c +++ b/target-arm/translate-a64.c @@ -160,16 +160,53 @@ static void unallocated_encoding(DisasContext *s) unallocated_encoding(s); \ } while (0); +static void free_tmp_a64(DisasContext *s) +{ + int i; + for (i = 0; i < s->tmp_a64_count; i++) { + tcg_temp_free_i64(s->tmp_a64[i]); + } + s->tmp_a64_count = 0; +} + +static TCGv_i64 new_tmp_a64_zero(DisasContext *s) +{ + assert(s->tmp_a64_count < TMP_A64_MAX); + return s->tmp_a64[s->tmp_a64_count++] = tcg_const_i64(0); +} + +static TCGv_i64 cpu_reg(DisasContext *s, int reg) +{ + if (reg == 31) { + return new_tmp_a64_zero(s); + } else { + return cpu_X[reg]; + } +} + /* * the instruction disassembly implemented here matches * the instruction encoding classifications in chapter 3 (C3) * of the ARM Architecture Reference Manual (DDI0487A_a) */ -/* Unconditional branch (immediate) */ +/* C3.2.7 Unconditional branch (immediate) + * 31 30 26 25 0 + * +----+-----------+-------------------------------------+ + * | op | 0 0 1 0 1 | imm26 | + * +----+-----------+-------------------------------------+ + */ static void disas_uncond_b_imm(DisasContext *s, uint32_t insn) { - unsupported_encoding(s, insn); + uint64_t addr = s->pc + sextract32(insn, 0, 26) * 4 - 4; + + if (insn & (1 << 31)) { + /* C5.6.26 BL Branch with link */ + tcg_gen_movi_i64(cpu_reg(s, 30), s->pc); + } + + /* C5.6.20 B Branch / C5.6.26 BL Branch with link */ + gen_goto_tb(s, 0, addr); } /* Compare & branch (immediate) */ @@ -651,6 +688,9 @@ static void disas_a64_insn(CPUARMState *env, DisasContext *s) assert(FALSE); /* all 15 cases should be handled above */ break; } + + /* if we allocated any temporaries, free them here */ + free_tmp_a64(s); } void gen_intermediate_code_internal_a64(ARMCPU *cpu, @@ -680,6 +720,7 @@ void gen_intermediate_code_internal_a64(ARMCPU *cpu, dc->condjmp = 0; dc->aarch64 = 1; + dc->tmp_a64_count = 0; dc->thumb = 0; dc->bswap_code = 0; dc->condexec_mask = 0; diff --git a/target-arm/translate.h b/target-arm/translate.h index 8789181..23a45da 100644 --- a/target-arm/translate.h +++ b/target-arm/translate.h @@ -24,6 +24,9 @@ typedef struct DisasContext { int vec_len; int vec_stride; int aarch64; +#define TMP_A64_MAX 16 + int tmp_a64_count; + TCGv_i64 tmp_a64[TMP_A64_MAX]; } DisasContext; extern TCGv_ptr cpu_env;