| Message ID | 20200524182710.576-1-richardcochran@gmail.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [net-next,V2] Let the ADJ_OFFSET interface respect the ADJ_NANO flag for PHC devices. | expand |
diff --git a/drivers/ptp/ptp_clock.c b/drivers/ptp/ptp_clock.c index fc984a8828fb..03a246e60fd9 100644 --- a/drivers/ptp/ptp_clock.c +++ b/drivers/ptp/ptp_clock.c @@ -147,8 +147,14 @@ static int ptp_clock_adjtime(struct posix_clock *pc, struct __kernel_timex *tx) err = ops->adjfreq(ops, ppb); ptp->dialed_frequency = tx->freq; } else if (tx->modes & ADJ_OFFSET) { - if (ops->adjphase) - err = ops->adjphase(ops, tx->offset); + if (ops->adjphase) { + s32 offset = tx->offset; + + if (!(tx->modes & ADJ_NANO)) + offset *= NSEC_PER_USEC; + + err = ops->adjphase(ops, offset); + } } else if (tx->modes == 0) { tx->freq = ptp->dialed_frequency; err = 0;
In commit 184ecc9eb260d5a3bcdddc5bebd18f285ac004e9 ("ptp: Add adjphase function to support phase offset control.") the PTP Hardware Clock interface expanded to support the ADJ_OFFSET offset mode. However, the implementation did not respect the traditional yet pedantic distinction between units of microseconds and nanoseconds signaled by the ADJ_NANO flag. This patch fixes the issue by adding logic to handle that flag. Signed-off-by: Richard Cochran <richardcochran@gmail.com> --- drivers/ptp/ptp_clock.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-)