| Message ID | E1jOkD3-00067R-RZ@rmk-PC.armlinux.org.uk |
|---|---|
| State | New |
| Headers | show |
| Series | arm: dts: imx6-sr-som: add ethernet PHY configuration | expand |
diff --git a/arch/arm/boot/dts/imx6qdl-sr-som.dtsi b/arch/arm/boot/dts/imx6qdl-sr-som.dtsi index 6d7f6b9035bc..b06577808ff4 100644 --- a/arch/arm/boot/dts/imx6qdl-sr-som.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sr-som.dtsi @@ -53,10 +53,21 @@ &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_microsom_enet_ar8035>; + phy-handle = <&phy>; phy-mode = "rgmii-id"; phy-reset-duration = <2>; phy-reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy: ethernet-phy@0 { + reg = <0>; + qca,clk-out-frequency = <125000000>; + }; + }; }; &iomuxc {
Add ethernet PHY configuration ahead of removing the quirk that configures the clocking mode for the PHY. The RGMII delay is already set correctly. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> --- This patch depends on b1f4c209d840 ("net: phy: at803x: fix clock sink configuration on ATH8030 and ATH8035") which has been recently merged. arch/arm/boot/dts/imx6qdl-sr-som.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+)