| Message ID | 20200626080631.4134-1-krzk@kernel.org |
|---|---|
| State | Accepted |
| Commit | 69cc1502a87f5ed12e27dbe5fe2bfdd5540826c7 |
| Headers | show |
| Series | ARM: dts: imx: Align L2 cache-controller nodename with dtschema | expand |
diff --git a/arch/arm/boot/dts/imx35.dtsi b/arch/arm/boot/dts/imx35.dtsi index e15408794d83..aba16252faab 100644 --- a/arch/arm/boot/dts/imx35.dtsi +++ b/arch/arm/boot/dts/imx35.dtsi @@ -59,7 +59,7 @@ interrupt-parent = <&avic>; ranges; - L2: l2-cache@30000000 { + L2: cache-controller@30000000 { compatible = "arm,l210-cache"; reg = <0x30000000 0x1000>; cache-unified; diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi index 346a52fc96d9..3a0e222a1ab8 100644 --- a/arch/arm/boot/dts/imx6qdl.dtsi +++ b/arch/arm/boot/dts/imx6qdl.dtsi @@ -245,7 +245,7 @@ interrupt-parent = <&intc>; }; - L2: l2-cache@a02000 { + L2: cache-controller@a02000 { compatible = "arm,pl310-cache"; reg = <0x00a02000 0x1000>; interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>; diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi index e2d25328b579..eb8aeaa5ccab 100644 --- a/arch/arm/boot/dts/imx6sl.dtsi +++ b/arch/arm/boot/dts/imx6sl.dtsi @@ -126,7 +126,7 @@ interrupt-parent = <&intc>; }; - L2: l2-cache@a02000 { + L2: cache-controller@a02000 { compatible = "arm,pl310-cache"; reg = <0x00a02000 0x1000>; interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>; diff --git a/arch/arm/boot/dts/imx6sll.dtsi b/arch/arm/boot/dts/imx6sll.dtsi index 3d1a689f5dec..554a31ea9c07 100644 --- a/arch/arm/boot/dts/imx6sll.dtsi +++ b/arch/arm/boot/dts/imx6sll.dtsi @@ -126,7 +126,7 @@ interrupt-parent = <&intc>; }; - L2: l2-cache@a02000 { + L2: cache-controller@a02000 { compatible = "arm,pl310-cache"; reg = <0x00a02000 0x1000>; interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi index 430c21aa88bf..537561446a5f 100644 --- a/arch/arm/boot/dts/imx6sx.dtsi +++ b/arch/arm/boot/dts/imx6sx.dtsi @@ -173,7 +173,7 @@ interrupt-parent = <&intc>; }; - L2: l2-cache@a02000 { + L2: cache-controller@a02000 { compatible = "arm,pl310-cache"; reg = <0x00a02000 0x1000>; interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
Fix dtschema validator warnings like: l2-cache@a02000: $nodename:0: 'l2-cache@a02000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> --- arch/arm/boot/dts/imx35.dtsi | 2 +- arch/arm/boot/dts/imx6qdl.dtsi | 2 +- arch/arm/boot/dts/imx6sl.dtsi | 2 +- arch/arm/boot/dts/imx6sll.dtsi | 2 +- arch/arm/boot/dts/imx6sx.dtsi | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-)