| Message ID | 20200320183455.21311-11-ansuelsmth@gmail.com |
|---|---|
| State | New |
| Headers | show |
| Series | None | expand |
> -----Messaggio originale----- > Da: Rob Herring <robh@kernel.org> > Inviato: martedì 31 marzo 2020 19:34 > A: Ansuel Smith <ansuelsmth@gmail.com> > Cc: Stanimir Varbanov <svarbanov@mm-sol.com>; Andy Gross > <agross@kernel.org>; Bjorn Andersson <bjorn.andersson@linaro.org>; > Bjorn Helgaas <bhelgaas@google.com>; Mark Rutland > <mark.rutland@arm.com>; Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>; > Andrew Murray <amurray@thegoodpenguin.co.uk>; Philipp Zabel > <p.zabel@pengutronix.de>; linux-arm-msm@vger.kernel.org; linux- > pci@vger.kernel.org; devicetree@vger.kernel.org; linux- > kernel@vger.kernel.org > Oggetto: Re: [PATCH 11/12] devicetree: bindings: pci: add force_gen1 for > qcom,pcie > > On Fri, Mar 20, 2020 at 07:34:53PM +0100, Ansuel Smith wrote: > > Document force_gen1 optional definition to limit pcie > > line to GEN1 speed > > > > Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> > > --- > > Documentation/devicetree/bindings/pci/qcom,pcie.txt | 5 +++++ > > 1 file changed, 5 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.txt > b/Documentation/devicetree/bindings/pci/qcom,pcie.txt > > index 8c1d014f37b0..766876465c42 100644 > > --- a/Documentation/devicetree/bindings/pci/qcom,pcie.txt > > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.txt > > @@ -260,6 +260,11 @@ > > Definition: If not defined is 0. In ipq806x is set to 7. In newer > > revision (v2.0) the offset is zero. > > > > +- force_gen1: > > + Usage: optional > > + Value type: <u32> > > + Definition: Set 1 to force the pcie line to GEN1 > > + > > I believe we have a standard property 'link-speed' for this purpose. > Yes this will be dropped in v2 > > * Example for ipq/apq8064 > > pcie@1b500000 { > > compatible = "qcom,pcie-apq8064", "qcom,pcie-ipq8064", > "snps,dw-pcie"; > > -- > > 2.25.1 > >
Hi Ansuel, Before inventing new DT property I'd suggest you to consult with [1]. There is already property max-link-speed for that purpose. On 3/20/20 8:34 PM, Ansuel Smith wrote: > Document force_gen1 optional definition to limit pcie > line to GEN1 speed > > Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> > --- > Documentation/devicetree/bindings/pci/qcom,pcie.txt | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.txt b/Documentation/devicetree/bindings/pci/qcom,pcie.txt > index 8c1d014f37b0..766876465c42 100644 > --- a/Documentation/devicetree/bindings/pci/qcom,pcie.txt > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.txt > @@ -260,6 +260,11 @@ > Definition: If not defined is 0. In ipq806x is set to 7. In newer > revision (v2.0) the offset is zero. > > +- force_gen1: > + Usage: optional > + Value type: <u32> > + Definition: Set 1 to force the pcie line to GEN1 > + > * Example for ipq/apq8064 > pcie@1b500000 { > compatible = "qcom,pcie-apq8064", "qcom,pcie-ipq8064", "snps,dw-pcie"; >
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.txt b/Documentation/devicetree/bindings/pci/qcom,pcie.txt index 8c1d014f37b0..766876465c42 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.txt +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.txt @@ -260,6 +260,11 @@ Definition: If not defined is 0. In ipq806x is set to 7. In newer revision (v2.0) the offset is zero. +- force_gen1: + Usage: optional + Value type: <u32> + Definition: Set 1 to force the pcie line to GEN1 + * Example for ipq/apq8064 pcie@1b500000 { compatible = "qcom,pcie-apq8064", "qcom,pcie-ipq8064", "snps,dw-pcie";
Document force_gen1 optional definition to limit pcie line to GEN1 speed Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> --- Documentation/devicetree/bindings/pci/qcom,pcie.txt | 5 +++++ 1 file changed, 5 insertions(+)