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[v5,15/21] target-arm: Implement cpu_set_tls() and cpu_clone_regs() for AArch64

Message ID 1372700120-8896-16-git-send-email-peter.maydell@linaro.org
State Superseded
Headers show

Commit Message

Peter Maydell July 1, 2013, 5:35 p.m. UTC 
From: Alexander Graf <agraf@suse.de>

[PMM: pulled out from another patch because this is going to need to
morph into a patch putting them into linux-user/aarch64/target_cpu.h
as soon as my patch doing that move for existing CPUs lands; also
use #ifdefs rather than is_a64().]

Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: John Rigby <john.rigby@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 target-arm/cpu.h |   17 +++++++++++++++++
 1 file changed, 17 insertions(+)
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Patch

diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 78614a4..f9288d1 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -303,10 +303,17 @@  int cpu_arm_handle_mmu_fault (CPUARMState *env, target_ulong address, int rw,
                               int mmu_idx);
 #define cpu_handle_mmu_fault cpu_arm_handle_mmu_fault
 
+#ifndef TARGET_AARCH64
 static inline void cpu_set_tls(CPUARMState *env, target_ulong newtls)
 {
   env->cp15.c13_tls2 = newtls;
 }
+#else
+static inline void cpu_set_tls(CPUARMState *env, target_ulong newtls)
+{
+    env->sr.tpidr_el0 = newtls;
+}
+#endif
 
 #define CPSR_M (0x1f)
 #define CPSR_T (1 << 5)
@@ -795,12 +802,22 @@  static inline int cpu_mmu_index (CPUARMState *env)
 }
 
 #if defined(CONFIG_USER_ONLY)
+#ifndef TARGET_AARCH64
 static inline void cpu_clone_regs(CPUARMState *env, target_ulong newsp)
 {
     if (newsp)
         env->regs[13] = newsp;
     env->regs[0] = 0;
 }
+#else
+static inline void cpu_clone_regs(CPUARMState *env, target_ulong newsp)
+{
+    if (newsp) {
+        env->xregs[31] = newsp;
+    }
+    env->xregs[0] = 0;
+}
+#endif
 #endif
 
 #include "exec/cpu-all.h"